SU ANN LIM

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PENANG, MY

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Patents Grantslast 30 patents

Information Patent Grant
System, apparatus and method for synchronizing multiple virtual lin...
- Patent number 12,001,353
- Issue date Jun 4, 2024
- Intel Corporation
- Joon Teik Hor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtualized link states of multiple protocol layer package intercon...
- Patent number 11,663,154
- Issue date May 30, 2023
- Intel Corporation
- Joon Teik Hor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamically determining measurement uncertainty (MU) of measurement...
- Patent number 11,543,448
- Issue date Jan 3, 2023
- Keysight Technologies, Inc.
- Su Ann Lim
- G01 - MEASURING TESTING
Information Patent Grant
Hardware mechanisms for link encryption
- Patent number 11,533,170
- Issue date Dec 20, 2022
- Intel Corporation
- Reouven Elbaz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for synchronizing multiple virtual lin...
- Patent number 11,442,876
- Issue date Sep 13, 2022
- Intel Corporation
- Joon Teik Hor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtualized link states of multiple protocol layer package intercon...
- Patent number 11,308,018
- Issue date Apr 19, 2022
- Intel Corporation
- Joon Teik Hor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reduced pin count interface
- Patent number 11,163,717
- Issue date Nov 2, 2021
- Intel Corporation
- Michelle Jen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, apparatus, and system for power management on a CPU die via...
- Patent number 11,016,549
- Issue date May 25, 2021
- Intel Corporation
- Poh Thiam Teoh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtualized link states of multiple protocol layer package intercon...
- Patent number 10,776,302
- Issue date Sep 15, 2020
- Intel Corporation
- Joon Teik Hor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reduced pin count interface
- Patent number 10,706,003
- Issue date Jul 7, 2020
- Intel Corporation
- Michelle Jen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated universal serial bus (USB) type-C switching
- Patent number 10,311,000
- Issue date Jun 4, 2019
- Intel Corporation
- Siang Lin Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for power management
- Patent number 10,248,183
- Issue date Apr 2, 2019
- Intel Corporation
- Jennifer Chin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual bus standard switching bus controller
- Patent number 10,229,080
- Issue date Mar 12, 2019
- Intel Corporation
- Ting Lok Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques enabling low power states for a communications port
- Patent number 10,209,911
- Issue date Feb 19, 2019
- Intel Corporation
- Jennifer Chin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reduced pin count interface
- Patent number 10,198,394
- Issue date Feb 5, 2019
- Intel Corporation
- Michelle Jen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Techniques for inter-component communication based on a state of a...
- Patent number 10,146,715
- Issue date Dec 4, 2018
- Intel Corporation
- Mikal C. Hunsaker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low overheard high throughput solution for point-to-point link
- Patent number 10,127,184
- Issue date Nov 13, 2018
- Intel Corporation
- Eng Hun Ooi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multichip package link
- Patent number 9,946,676
- Issue date Apr 17, 2018
- Intel Corporation
- Mahesh Wagh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Inter-component communication including posted and non-posted trans...
- Patent number 9,921,987
- Issue date Mar 20, 2018
- Intel Corporation
- Mikal C. Hunsaker
- G11 - INFORMATION STORAGE
Information Patent Grant
Method, apparatus and system for single-ended communication of tran...
- Patent number 9,910,814
- Issue date Mar 6, 2018
- Intel Corporation
- Bryan L. Spry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Architected protocol for changing link operating mode
- Patent number 9,830,292
- Issue date Nov 28, 2017
- Intel Corporation
- Mahesh Wagh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Systems, apparatuses, and methods for synchronizing port entry into...
- Patent number 9,753,529
- Issue date Sep 5, 2017
- Intel Corporation
- Mahesh Wagh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Inter-component communication including posted and non-posted trans...
- Patent number 9,619,416
- Issue date Apr 11, 2017
- Intel Corporation
- Mikal C. Hunsaker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for inter-component communication based on a state of a...
- Patent number 9,588,922
- Issue date Mar 7, 2017
- Intel Corporation
- Mikal C. Hunsaker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Device, method and system for operation of a low power PHY with a P...
- Patent number 9,575,552
- Issue date Feb 21, 2017
- Intel Corporation
- Choon Gun Por
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, apparatuses, and methods for synchronizing port entry into...
- Patent number 9,563,260
- Issue date Feb 7, 2017
- Intel Corporation
- Mahesh Wagh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Processor hiding its power-up latency with activation of a root por...
- Patent number 9,563,256
- Issue date Feb 7, 2017
- Intel Corporation
- Sun Zheng E
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, apparatus, and system to handle transactions received after...
- Patent number 9,558,030
- Issue date Jan 31, 2017
- Intel Corporation
- Su Wei Lim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for power management
- Patent number 9,513,662
- Issue date Dec 6, 2016
- Intel Corporation
- Jennifer Chin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for clock frequency ratio independent error lo...
- Patent number 9,489,008
- Issue date Nov 8, 2016
- Intel Corporation
- Ming Yi Lim
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
INTERFACE TECHNIQUES FOR STACKED MEMORY ARCHITECTURES
- Publication number 20240404581
- Publication date Dec 5, 2024
- Micron Technology, Inc.
- Ameen D. Akel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY FAILURE PREDICTION AND MITIGATION
- Publication number 20240403177
- Publication date Dec 5, 2024
- Micron Technology, Inc.
- Su Wei Lim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System, Apparatus And Method For Synchronizing Multiple Virtual Lin...
- Publication number 20230026906
- Publication date Jan 26, 2023
- Intel Corporation
- Joon Teik Hor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUALIZED LINK STATES OF MULTIPLE PROTOCOL LAYER PACKAGE INTERCON...
- Publication number 20220350769
- Publication date Nov 3, 2022
- Intel Corporation
- Joon Teik Hor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC PROVISIONING OF PCIE DEVICES AT RUN TIME FOR BARE METAL SER...
- Publication number 20220156211
- Publication date May 19, 2022
- Intel Corporation
- Eng Hun Ooi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCED PIN COUNT INTERFACE
- Publication number 20210056067
- Publication date Feb 25, 2021
- Intel Corporation
- Michelle Jen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUALIZED LINK STATES OF MULTIPLE PROTOCOL LAYER PACKAGE INTERCON...
- Publication number 20200409899
- Publication date Dec 31, 2020
- Intel Corporation
- Joon Teik Hor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System, Apparatus And Method For Synchronizing Multiple Virtual Lin...
- Publication number 20190347218
- Publication date Nov 14, 2019
- Joon Teik Hor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCED PIN COUNT INTERFACE
- Publication number 20190303338
- Publication date Oct 3, 2019
- Intel Corporation
- Michelle Jen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE MECHANISMS FOR LINK ENCRYPTION
- Publication number 20190229901
- Publication date Jul 25, 2019
- Intel Corporation
- Reouven Elbaz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUALIZED LINK STATES OF MULTIPLE PROTOCOL LAYER PACKAGE INTERCON...
- Publication number 20190227972
- Publication date Jul 25, 2019
- Intel Corporation
- Joon Teik Hor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED UNIVERSAL SERIAL BUS (USB) TYPE-C SWITCHING
- Publication number 20190102335
- Publication date Apr 4, 2019
- Intel Corporation
- Siang Lin Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ROOT COMPLEX INTEGRATED ENDPOINT EMULATION OF A DISCREET PCIE ENDPOINT
- Publication number 20190095554
- Publication date Mar 28, 2019
- Intel Corporation
- Eng Hun Ooi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, APPARATUS, AND SYSTEM FOR POWER MANAGEMENT ON A CPU DIE VIA...
- Publication number 20190041936
- Publication date Feb 7, 2019
- Poh Thiam Teoh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OVERLOADING MEMORY ADDRESS FIELDS WHILE MAINTAINING ADDRESS BOUNDAR...
- Publication number 20190042155
- Publication date Feb 7, 2019
- Intel Corporation
- Eng Hun Ooi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW OVERHEARD HIGH THROUGHPUT SOLUTION FOR POINT-TO-POINT LINK
- Publication number 20180089137
- Publication date Mar 29, 2018
- Intel Corporation
- Eng Hun OOI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCED PIN COUNT INTERFACE
- Publication number 20170344512
- Publication date Nov 30, 2017
- Intel Corporation
- Michelle Jen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SERIAL SIDEBAND SIGNALING LINK
- Publication number 20170235701
- Publication date Aug 17, 2017
- Intel Corporation
- Akshay Pethe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR INTER-COMPONENT COMMUNICATION BASED ON A STATE OF A...
- Publication number 20170132171
- Publication date May 11, 2017
- Intel Corporation
- Mikal C. Hunsaker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR POWER MANAGEMENT
- Publication number 20170083079
- Publication date Mar 23, 2017
- Intel Corporation
- Jennifer Chin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Inter-component communication including posted and non-posted trans...
- Publication number 20170024343
- Publication date Jan 26, 2017
- Intel Corporation
- Mikal C. Hunsaker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTICHIP PACKAGE LINK
- Publication number 20160283429
- Publication date Sep 29, 2016
- Intel Corporation
- Mahesh Wagh
- G01 - MEASURING TESTING
Information Patent Application
SYSTEMS, APPARATUSES, AND METHODS FOR SYNCHRONIZING PORT ENTRY INTO...
- Publication number 20160259400
- Publication date Sep 8, 2016
- Intel Corporation
- Mahesh Wagh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES ENABLING LOW POWER STATES FOR A COMMUNICATIONS PORT
- Publication number 20160231958
- Publication date Aug 11, 2016
- Intel Corporation
- Jennifer CHIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DUAL BUS STANDARD SWITCHING BUS CONTROLLER
- Publication number 20160085707
- Publication date Mar 24, 2016
- Intel Corporation
- Ting Lok Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Architected Protocol For Changing Link Operating Mode
- Publication number 20150370753
- Publication date Dec 24, 2015
- Intel Corporation
- Mahesh Wagh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, APPARATUS AND SYSTEM FOR SINGLE-ENDED COMMUNICATION OF TRAN...
- Publication number 20150269109
- Publication date Sep 24, 2015
- Bryan L. Spry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEVICE, METHOD AND SYSTEM FOR OPERATION OF A LOW POWER PHY WITH A P...
- Publication number 20150220140
- Publication date Aug 6, 2015
- Chun Gun Por
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTER-COMPONENT COMMUNICATION INCLUDING SLAVE COMPONENT INITIATED T...
- Publication number 20150212959
- Publication date Jul 30, 2015
- Intel Corporation
- Mikal Hunsaker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTER-COMPONENT COMMUNICATION INCLUDING SLAVE COMPONENT INITIATED T...
- Publication number 20150199248
- Publication date Jul 16, 2015
- Intel Corporation
- Mikal C. Hunsaker
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

System, apparatus and method for synchronizing multiple virtual lin...

Virtualized link states of multiple protocol layer package intercon...

Dynamically determining measurement uncertainty (MU) of measurement...

Hardware mechanisms for link encryption

System, apparatus and method for synchronizing multiple virtual lin...

Virtualized link states of multiple protocol layer package intercon...

Reduced pin count interface

Method, apparatus, and system for power management on a CPU die via...

Virtualized link states of multiple protocol layer package intercon...

Reduced pin count interface

Integrated universal serial bus (USB) type-C switching

System and method for power management

Dual bus standard switching bus controller

Techniques enabling low power states for a communications port

Reduced pin count interface

Techniques for inter-component communication based on a state of a...

Low overheard high throughput solution for point-to-point link

Multichip package link

Inter-component communication including posted and non-posted trans...

Method, apparatus and system for single-ended communication of tran...

Architected protocol for changing link operating mode

Systems, apparatuses, and methods for synchronizing port entry into...

Inter-component communication including posted and non-posted trans...

Techniques for inter-component communication based on a state of a...

Device, method and system for operation of a low power PHY with a P...

Systems, apparatuses, and methods for synchronizing port entry into...

Processor hiding its power-up latency with activation of a root por...

Method, apparatus, and system to handle transactions received after...

System and method for power management

Method and apparatus for clock frequency ratio independent error lo...

Patents Applicationslast 30 patents

INTERFACE TECHNIQUES FOR STACKED MEMORY ARCHITECTURES

MEMORY FAILURE PREDICTION AND MITIGATION

System, Apparatus And Method For Synchronizing Multiple Virtual Lin...

VIRTUALIZED LINK STATES OF MULTIPLE PROTOCOL LAYER PACKAGE INTERCON...

DYNAMIC PROVISIONING OF PCIE DEVICES AT RUN TIME FOR BARE METAL SER...

REDUCED PIN COUNT INTERFACE

VIRTUALIZED LINK STATES OF MULTIPLE PROTOCOL LAYER PACKAGE INTERCON...

System, Apparatus And Method For Synchronizing Multiple Virtual Lin...

REDUCED PIN COUNT INTERFACE

HARDWARE MECHANISMS FOR LINK ENCRYPTION

VIRTUALIZED LINK STATES OF MULTIPLE PROTOCOL LAYER PACKAGE INTERCON...

INTEGRATED UNIVERSAL SERIAL BUS (USB) TYPE-C SWITCHING

ROOT COMPLEX INTEGRATED ENDPOINT EMULATION OF A DISCREET PCIE ENDPOINT

METHOD, APPARATUS, AND SYSTEM FOR POWER MANAGEMENT ON A CPU DIE VIA...

OVERLOADING MEMORY ADDRESS FIELDS WHILE MAINTAINING ADDRESS BOUNDAR...

LOW OVERHEARD HIGH THROUGHPUT SOLUTION FOR POINT-TO-POINT LINK

REDUCED PIN COUNT INTERFACE

SERIAL SIDEBAND SIGNALING LINK

TECHNIQUES FOR INTER-COMPONENT COMMUNICATION BASED ON A STATE OF A...

SYSTEM AND METHOD FOR POWER MANAGEMENT

Inter-component communication including posted and non-posted trans...

MULTICHIP PACKAGE LINK

SYSTEMS, APPARATUSES, AND METHODS FOR SYNCHRONIZING PORT ENTRY INTO...

TECHNIQUES ENABLING LOW POWER STATES FOR A COMMUNICATIONS PORT

DUAL BUS STANDARD SWITCHING BUS CONTROLLER

Architected Protocol For Changing Link Operating Mode

METHOD, APPARATUS AND SYSTEM FOR SINGLE-ENDED COMMUNICATION OF TRAN...

DEVICE, METHOD AND SYSTEM FOR OPERATION OF A LOW POWER PHY WITH A P...

INTER-COMPONENT COMMUNICATION INCLUDING SLAVE COMPONENT INITIATED T...

INTER-COMPONENT COMMUNICATION INCLUDING SLAVE COMPONENT INITIATED T...