Subramanian Ganesan

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Saratoga, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Automatic clock to enable conversion for FPGA based prototyping sys...
- Patent number 8,850,381
- Issue date Sep 30, 2014
- Cadence Design Systems, Inc.
- Subramanian Ganesan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating user clocks for a prototyping environment
- Patent number 8,595,683
- Issue date Nov 26, 2013
- Cadence Design Systems, Inc.
- Philip H. de Buren
- G06 - COMPUTING CALCULATING COUNTING