Sudhakar Bobba

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Microprocessor performance and power optimization through self cali...
- Patent number 8,648,645
- Issue date Feb 11, 2014
- Oracle International Corporation
- Georgios Konstadinidis
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Microprocessor performance and power optimization through inductive...
- Patent number 8,060,766
- Issue date Nov 15, 2011
- Oracle America, Inc.
- Georgios K. Konstadinidis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signal shielding technique using active shields for non-interacting...
- Patent number 7,155,695
- Issue date Dec 26, 2006
- Sun Microsystems, Inc.
- Sudhakar Bobba
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thin capacitive structure
- Patent number 7,098,501
- Issue date Aug 29, 2006
- Sun Microsystems, Inc.
- Weiran Kong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Region-based voltage drop budgets for low-power design
- Patent number 6,976,235
- Issue date Dec 13, 2005
- Sun Microsystems, Inc.
- Sudhakar Bobba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Accuracy of timing analysis using region-based voltage drop budgets
- Patent number 6,971,079
- Issue date Nov 29, 2005
- Sun Microsystems, Inc.
- Gin Yee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Duty cycle corrector
- Patent number 6,882,196
- Issue date Apr 19, 2005
- Sun Microsystems, Inc.
- Gin Yee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase locked loop design with diode for loop filter capacitance lea...
- Patent number 6,861,885
- Issue date Mar 1, 2005
- Sun Microsystems, Inc.
- Pradeep Trivedi
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Transmission gate based signal transition accelerator
- Patent number 6,784,689
- Issue date Aug 31, 2004
- Sun Microsystems, Inc.
- Sudhakar Bobba
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
150 degree bump placement layout for an integrated circuit power grid
- Patent number 6,762,505
- Issue date Jul 13, 2004
- Sun Microsystems
- Sudhakar Bobba
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dynamic modulation of on-chip supply voltage for low-power design
- Patent number 6,737,844
- Issue date May 18, 2004
- Sun Microsystems, Inc.
- Pradeep Trivedi
- G11 - INFORMATION STORAGE
Information Patent Grant
Shield assignment using preferential shields
- Patent number 6,721,936
- Issue date Apr 13, 2004
- Sun Microsystems, Inc.
- Sudhakar Bobba
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Clock skew reduction using active shields
- Patent number 6,708,314
- Issue date Mar 16, 2004
- Sun Microsystems, Inc.
- Pradeep R. Trivedi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decoupling capacitance assignment technique with minimum leakage power
- Patent number 6,694,493
- Issue date Feb 17, 2004
- Sun Microsystems, Inc.
- Sudhakar Bobba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic optimization for preferential shields
- Patent number 6,687,886
- Issue date Feb 3, 2004
- Sun Microsystems, Inc.
- Sudhakar Bobba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technique for optimizing decoupling capacitance subject to leakage...
- Patent number 6,658,629
- Issue date Dec 2, 2003
- Sun Microsystems, Inc.
- Sudhakar Bobba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Increasing implicit decoupling capacitance using asymmetric shieldings
- Patent number 6,653,857
- Issue date Nov 25, 2003
- Sun Microsystems, Inc.
- Sudhakar Bobba
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Clock power reduction technique using multi-level voltage input clo...
- Patent number 6,646,472
- Issue date Nov 11, 2003
- Sun Microsystems, Inc.
- Pradeep Trivedi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple supply voltage dynamic logic
- Patent number 6,646,473
- Issue date Nov 11, 2003
- Sun Microsystems, Inc.
- Pradeep Trivedi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Frequency multiplier design
- Patent number 6,642,756
- Issue date Nov 4, 2003
- Sun Microsystems, Inc.
- Gin Yee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decoupling capacitor assignment technique with respect to leakage p...
- Patent number 6,640,331
- Issue date Oct 28, 2003
- Sun Microsystems, Inc.
- Pradeep Trivedi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Increasing decoupling capacitance using preferential shields
- Patent number 6,628,138
- Issue date Sep 30, 2003
- Sun Microsystems, Inc.
- Sudhakar Bobba
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Signal routing based approach for increasing decoupling capacitance...
- Patent number 6,629,306
- Issue date Sep 30, 2003
- Sun Microsystems, Inc.
- Sudhakar Bobba
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Sliding grid based technique for optimal on-chip decap insertion
- Patent number 6,625,791
- Issue date Sep 23, 2003
- Sun Microsystems, Inc.
- Sudhakar Bobba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
120 degree bump placement layout for an integrated circuit power grid
- Patent number 6,617,699
- Issue date Sep 9, 2003
- Sun Microsystems, Inc.
- Sudhakar Bobba
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
180 degree bump placement layout for an integrated circuit power grid
- Patent number 6,577,002
- Issue date Jun 10, 2003
- Sun Microsystems, Inc.
- Sudhakar Bobba
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Phase locked loop design with switch for loop filter capacitance le...
- Patent number 6,570,422
- Issue date May 27, 2003
- Sun Microsystems, Inc.
- Pradeep Trivedi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable current source adjustment of leakage current for phase...
- Patent number 6,570,423
- Issue date May 27, 2003
- Sun Microsystems, Inc.
- Pradeep R. Trivedi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Current crowding reduction technique for flip chip package technology
- Patent number 6,566,758
- Issue date May 20, 2003
- Sun Microsystems, Inc.
- Pradeep Trivedi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Signal shielding assignment technique for precharge based logic
- Patent number 6,563,336
- Issue date May 13, 2003
- Sun Microsystems, Inc.
- Sudhakar Bobba
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
MICROPROCESSOR PERFORMANCE AND POWER OPTIMIZATION THROUGH SELF CALI...
- Publication number 20110291630
- Publication date Dec 1, 2011
- Oracle International Corporation
- Georgios Konstadinidis
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
MICROPROCESSOR PERFORMANCE AND POWER OPTIMIZATION THROUGH INDUCTIVE...
- Publication number 20100229021
- Publication date Sep 9, 2010
- SUN MICROSYSTEMS, INC.
- Georgios K. Konstadinidis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Metal insulator metal capacitor
- Publication number 20040150026
- Publication date Aug 5, 2004
- SUN MICROSYSTEMS, INC.
- Weiran Kong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Region-based voltage drop budgets for low-power design
- Publication number 20040054979
- Publication date Mar 18, 2004
- Sudhakar Bobba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Accuracy of timing analysis using region-based voltage drop budgets
- Publication number 20040054975
- Publication date Mar 18, 2004
- Gin Yee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Duty cycle corrector
- Publication number 20040012428
- Publication date Jan 22, 2004
- Gin Yee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PHASE LOCKED LOOP DESIGN WITH DIODE FOR LOOP FILTER CAPACITANCE LEA...
- Publication number 20040012421
- Publication date Jan 22, 2004
- Pradeep Trivedi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Dynamic modulation of on-chip supply voltage for low-power design
- Publication number 20030223301
- Publication date Dec 4, 2003
- Pradeep Trivedi
- G11 - INFORMATION STORAGE
Information Patent Application
Clock skew reduction using active shields
- Publication number 20030221174
- Publication date Nov 27, 2003
- Pradeep R. Trivedi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUE FOR OPTIMIZING DECOUPLING CAPACITANCE SUBJECT TO LEAKAGE...
- Publication number 20030212965
- Publication date Nov 13, 2003
- Sudhakar Bobba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Signal shielding technique using active shields for non-interacting...
- Publication number 20030147189
- Publication date Aug 7, 2003
- Sudhakar Bobba
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Transmission gate based signal transition accelerator
- Publication number 20030146773
- Publication date Aug 7, 2003
- Sudhakar Bobba
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Current crowding reduction technique using slots
- Publication number 20030122258
- Publication date Jul 3, 2003
- Sudhakar Bobba
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Current crowding reduction technique using selective current injection
- Publication number 20030122259
- Publication date Jul 3, 2003
- Sudhakar Bobba
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Logic optimization for preferential shields
- Publication number 20030106031
- Publication date Jun 5, 2003
- Sudhakar Bobba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Shield assignment using preferential shields
- Publication number 20030106034
- Publication date Jun 5, 2003
- Sudhakar Bobba
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
DECOUPLING CAPACITOR ASSIGNMENT TECHNIQUE WITH RESPECT TO LEAKAGE P...
- Publication number 20030106033
- Publication date Jun 5, 2003
- Pradeep Trivedi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Signal routing based approach for increasing decoupling capacitance...
- Publication number 20030106035
- Publication date Jun 5, 2003
- Sudhakar Bobba
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
INCREASING DECOUPLING CAPACITANCE USING PREFERENTIAL SHIELDS
- Publication number 20030102887
- Publication date Jun 5, 2003
- Sudhakar Bobba
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
180 DEGREE BUMP PLACEMENT LAYOUT FOR AN INTEGRATED CIRCUIT POWER GRID
- Publication number 20030098500
- Publication date May 29, 2003
- Sudhakar Bobba
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
CURRENT CROWDING REDUCTION TECHNIQUE FOR FLIP CHIP PACKAGE TECHNOLOGY
- Publication number 20030098510
- Publication date May 29, 2003
- Pradeep Trivedi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
120 Degree bump placement layout for an integrated circuit power grid
- Publication number 20030098508
- Publication date May 29, 2003
- Sudhakar Bobba
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
150 degree bump placement layout for an integrated circuit power grid
- Publication number 20030098512
- Publication date May 29, 2003
- Sudhakar Bobba
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Decoupling capacitance assignment technique with minimum leakage power
- Publication number 20030093761
- Publication date May 15, 2003
- Sudhakar Bobba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Increasing implicit decoupling capacitance using asymmetric shieldings
- Publication number 20030080773
- Publication date May 1, 2003
- Sudhakar Bobba
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Sudhakar Bobba

Person

Patents Grantslast 30 patents

Microprocessor performance and power optimization through self cali...

Microprocessor performance and power optimization through inductive...

Signal shielding technique using active shields for non-interacting...

Thin capacitive structure

Region-based voltage drop budgets for low-power design

Accuracy of timing analysis using region-based voltage drop budgets

Duty cycle corrector

Phase locked loop design with diode for loop filter capacitance lea...

Transmission gate based signal transition accelerator

150 degree bump placement layout for an integrated circuit power grid

Dynamic modulation of on-chip supply voltage for low-power design

Shield assignment using preferential shields

Clock skew reduction using active shields

Decoupling capacitance assignment technique with minimum leakage power

Logic optimization for preferential shields

Technique for optimizing decoupling capacitance subject to leakage...

Increasing implicit decoupling capacitance using asymmetric shieldings

Clock power reduction technique using multi-level voltage input clo...

Multiple supply voltage dynamic logic

Frequency multiplier design

Decoupling capacitor assignment technique with respect to leakage p...

Increasing decoupling capacitance using preferential shields

Signal routing based approach for increasing decoupling capacitance...

Sliding grid based technique for optimal on-chip decap insertion

120 degree bump placement layout for an integrated circuit power grid

180 degree bump placement layout for an integrated circuit power grid

Phase locked loop design with switch for loop filter capacitance le...

Programmable current source adjustment of leakage current for phase...

Current crowding reduction technique for flip chip package technology

Signal shielding assignment technique for precharge based logic

Patents Applicationslast 30 patents

MICROPROCESSOR PERFORMANCE AND POWER OPTIMIZATION THROUGH SELF CALI...

MICROPROCESSOR PERFORMANCE AND POWER OPTIMIZATION THROUGH INDUCTIVE...

Metal insulator metal capacitor

Region-based voltage drop budgets for low-power design

Accuracy of timing analysis using region-based voltage drop budgets

Duty cycle corrector

PHASE LOCKED LOOP DESIGN WITH DIODE FOR LOOP FILTER CAPACITANCE LEA...

Dynamic modulation of on-chip supply voltage for low-power design

Clock skew reduction using active shields

TECHNIQUE FOR OPTIMIZING DECOUPLING CAPACITANCE SUBJECT TO LEAKAGE...

Signal shielding technique using active shields for non-interacting...

Transmission gate based signal transition accelerator

Current crowding reduction technique using slots

Current crowding reduction technique using selective current injection

Logic optimization for preferential shields

Shield assignment using preferential shields

DECOUPLING CAPACITOR ASSIGNMENT TECHNIQUE WITH RESPECT TO LEAKAGE P...

Signal routing based approach for increasing decoupling capacitance...

INCREASING DECOUPLING CAPACITANCE USING PREFERENTIAL SHIELDS

180 DEGREE BUMP PLACEMENT LAYOUT FOR AN INTEGRATED CIRCUIT POWER GRID

CURRENT CROWDING REDUCTION TECHNIQUE FOR FLIP CHIP PACKAGE TECHNOLOGY

120 Degree bump placement layout for an integrated circuit power grid

150 degree bump placement layout for an integrated circuit power grid

Decoupling capacitance assignment technique with minimum leakage power

Increasing implicit decoupling capacitance using asymmetric shieldings