Sudheer Vemulapalli

Person

Allen, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Phase interpolator and a delay circuit for the phase interpolator
- Patent number 8,446,198
- Issue date May 21, 2013
- Texas Instruments Incorporated
- Anant Shankar Kamath
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Transmitter PLL with bandwidth on demand
- Patent number 8,126,401
- Issue date Feb 28, 2012
- Texas Instruments Incorporated
- Robert Bogdan Staszewski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital phase locked loop with integer channel mitigation
- Patent number 8,050,375
- Issue date Nov 1, 2011
- Texas Instruments Incorporated
- Robert Bogdan Staszewski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Interpolative all-digital phase locked loop
- Patent number 8,045,670
- Issue date Oct 25, 2011
- Texas Instruments Incorporated
- Khurram Waheed
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital phase locked loop with gear shifting
- Patent number 7,777,576
- Issue date Aug 17, 2010
- Texas Instruments Incorporated
- Khurram Waheed
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and method for a time alignment analog notch
- Patent number 7,761,068
- Issue date Jul 20, 2010
- Texas Instruments Incorporated
- Sameh Sameer Rezeq
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit for high-resolution phase detection in a digital RF processor
- Patent number 7,205,924
- Issue date Apr 17, 2007
- Texas Instruments Incorporated
- Sudheer K. Vemulapalli
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
PHASE INTERPOLATOR AND A DELAY CIRCUIT FOR THE PHASE INTERPOLATOR
- Publication number 20110254603
- Publication date Oct 20, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Anant Shankar KAMATH
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Transmitter PLL with Bandwidth on Demand
- Publication number 20090325494
- Publication date Dec 31, 2009
- Robert Bogdan Staszewski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Interpolative All-Digital Phase Locked Loop
- Publication number 20080317187
- Publication date Dec 25, 2008
- Khurram Waheed
- G04 - HOROLOGY
Information Patent Application
Digital Phase Locked Loop with Integer Channel Mitigation
- Publication number 20080317188
- Publication date Dec 25, 2008
- Robert Bogdan Staszewski
- G04 - HOROLOGY
Information Patent Application
Digital Phase Locked Loop with Gear Shifting
- Publication number 20080315960
- Publication date Dec 25, 2008
- Khurram Waheed
- G04 - HOROLOGY
Information Patent Application
System and method for a time alignment analog notch
- Publication number 20080233898
- Publication date Sep 25, 2008
- TEXAS INSTRUMENTS INCORPORATED
- Sameh Sameer Rezeq
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Circuit for high-resolution phase detection in a digital RF processor
- Publication number 20060103566
- Publication date May 18, 2006
- TEXAS INSTRUMENTS INCORPORATED
- Sudheer K. Vemulapalli
- G04 - HOROLOGY

Sudheer Vemulapalli

Person

Patents Grantslast 30 patents

Phase interpolator and a delay circuit for the phase interpolator

Transmitter PLL with bandwidth on demand

Digital phase locked loop with integer channel mitigation

Interpolative all-digital phase locked loop

Digital phase locked loop with gear shifting

System and method for a time alignment analog notch

Circuit for high-resolution phase detection in a digital RF processor

Patents Applicationslast 30 patents

PHASE INTERPOLATOR AND A DELAY CIRCUIT FOR THE PHASE INTERPOLATOR

Transmitter PLL with Bandwidth on Demand

Interpolative All-Digital Phase Locked Loop

Digital Phase Locked Loop with Integer Channel Mitigation

Digital Phase Locked Loop with Gear Shifting

System and method for a time alignment analog notch

Circuit for high-resolution phase detection in a digital RF processor