Suhas Mysore Satheesh

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Integrated current monitor using variable drain-to-source voltages
- Patent number 12,360,152
- Issue date Jul 15, 2025
- NVIDIA Corporation
- Miguel Rodriguez
- G01 - MEASURING TESTING
Information Patent Grant
Transient current-mode signaling scheme for on-chip interconnect fa...
- Patent number 12,339,700
- Issue date Jun 24, 2025
- NVIDIA Corp.
- Jiale Liang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On-die techniques for asynchnorously comparing voltages
- Patent number 11,777,483
- Issue date Oct 3, 2023
- NVIDIA Corporation
- Nishit Harshad Shah
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
On-die techniques for converting currents to frequencies
- Patent number 11,619,661
- Issue date Apr 4, 2023
- NVIDIA Corporation
- Nishit Harshad Shah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for measuring an integrated circuit age
- Patent number 9,255,967
- Issue date Feb 9, 2016
- NVIDIA Corporation
- Rubil Ahmadi
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER

Patents Applicationslast 30 patents

Information Patent Application
CIRCUIT TO PROTECT AGAINST MULTI-RAIL VOLTAGE GLITCHING ATTACKS
- Publication number 20250004522
- Publication date Jan 2, 2025
- NVIDIA Corp.
- Jiale Liang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CURRENT MONITOR
- Publication number 20240353475
- Publication date Oct 24, 2024
- NVIDIA Corporation
- Miguel Rodriguez
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
INTEGRATED CURRENT MONITOR USING VARIABLE DRAIN-TO-SOURCE VOLTAGES
- Publication number 20240353471
- Publication date Oct 24, 2024
- NVIDA CORPORATION
- Miguel Rodriguez
- G01 - MEASURING TESTING
Information Patent Application
TRANSIENT CURRENT-MODE SIGNALING SCHEME FOR ON-CHIP INTERCONNECT FA...
- Publication number 20240264625
- Publication date Aug 8, 2024
- NVIDIA Corp.
- Jiale Liang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ON-DIE TECHNIQUES FOR ASYNCHNOROUSLY COMPARING VOLTAGES
- Publication number 20230299760
- Publication date Sep 21, 2023
- NVIDIA Corporation
- Nishit Harshad SHAH
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TECHNIQUE FOR ENABLING ON-DIE NOISE MEASUREMENT DURING ATE TESTING...
- Publication number 20230146920
- Publication date May 11, 2023
- NVIDIA Corporation
- Bonita Bhaskaran
- G01 - MEASURING TESTING
Information Patent Application
SYSTEM AND METHOD FOR MEASURING AN INTEGRATED CIRCUIT AGE
- Publication number 20140306687
- Publication date Oct 16, 2014
- NVIDIA Corporation
- Rubil Ahmadi
- G01 - MEASURING TESTING

Suhas Mysore Satheesh

Person

Patents Grantslast 30 patents

Integrated current monitor using variable drain-to-source voltages

Transient current-mode signaling scheme for on-chip interconnect fa...

On-die techniques for asynchnorously comparing voltages

On-die techniques for converting currents to frequencies

System and method for measuring an integrated circuit age

Patents Applicationslast 30 patents

CIRCUIT TO PROTECT AGAINST MULTI-RAIL VOLTAGE GLITCHING ATTACKS

INTEGRATED CURRENT MONITOR

INTEGRATED CURRENT MONITOR USING VARIABLE DRAIN-TO-SOURCE VOLTAGES

TRANSIENT CURRENT-MODE SIGNALING SCHEME FOR ON-CHIP INTERCONNECT FA...

ON-DIE TECHNIQUES FOR ASYNCHNOROUSLY COMPARING VOLTAGES

TECHNIQUE FOR ENABLING ON-DIE NOISE MEASUREMENT DURING ATE TESTING...

SYSTEM AND METHOD FOR MEASURING AN INTEGRATED CIRCUIT AGE