Sujeet Ayyapureddi

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatus with memory process feedback
- Patent number 12,260,896
- Issue date Mar 25, 2025
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Grant
Row hammer interrupts to the operating system
- Patent number 12,248,567
- Issue date Mar 11, 2025
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Capability messaging for memory operations across banks with multip...
- Patent number 12,242,726
- Issue date Mar 4, 2025
- Micron Technology, Inc.
- Sujeet V. Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Aliased row hammer detector
- Patent number 12,230,311
- Issue date Feb 18, 2025
- Micron Technology, Inc.
- Edmund Gieske
- G11 - INFORMATION STORAGE
Information Patent Grant
Finite time counting period counting of infinite data streams
- Patent number 12,217,824
- Issue date Feb 4, 2025
- Micron Technology, Inc.
- Edmund Gieske
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses, systems, and methods for managing metadata security an...
- Patent number 12,204,770
- Issue date Jan 21, 2025
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Area-optimized row hammer mitigation
- Patent number 12,182,413
- Issue date Dec 31, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Buffer configurations for communications between memory dies and a...
- Patent number 12,170,127
- Issue date Dec 17, 2024
- Micron Technology, Inc.
- Sujeet V. Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with memory-initiated command insertion, and associated syst...
- Patent number 12,164,803
- Issue date Dec 10, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decoupling capacitors for semiconductor devices
- Patent number 12,160,986
- Issue date Dec 3, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Practical and efficient row hammer error detection
- Patent number 12,119,043
- Issue date Oct 15, 2024
- Micron Technology, Inc.
- Edmund Gieske
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses, systems, and methods for forced error check and scrub...
- Patent number 12,111,727
- Issue date Oct 8, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory operations across banks with multiple column access
- Patent number 12,105,955
- Issue date Oct 1, 2024
- Micron Technology, Inc.
- Sujeet V. Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Testing operations for memory systems
- Patent number 12,067,257
- Issue date Aug 20, 2024
- Micron Technology, Inc.
- Yuan He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device security and row hammer mitigation
- Patent number 12,067,270
- Issue date Aug 20, 2024
- Micron Technology, Inc.
- Yang Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses, systems, and methods for per row error scrub information
- Patent number 12,019,513
- Issue date Jun 25, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses, systems, and methods for managing metadata storage at...
- Patent number 12,014,797
- Issue date Jun 18, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory devices and systems configured to communicate a delay signal...
- Patent number 11,996,135
- Issue date May 28, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic row hammering threshold for memory
- Patent number 11,990,173
- Issue date May 21, 2024
- Micron Technology, Inc.
- Sujeet V. Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses, systems, and methods for memory initiated calibration
- Patent number 11,979,147
- Issue date May 7, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multiple bit error detection in scrub operations
- Patent number 11,966,287
- Issue date Apr 23, 2024
- Micron Technology, Inc.
- Sujeet V. Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for bad row mode
- Patent number 11,915,775
- Issue date Feb 27, 2024
- Micron Technology, Inc.
- Jack Riley
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses, systems, and methods for resetting row hammer detector...
- Patent number 11,881,247
- Issue date Jan 23, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Grant
Scrub operations with row error information
- Patent number 11,841,765
- Issue date Dec 12, 2023
- Micron Technology, Inc.
- Sujeet V. Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory array error correction
- Patent number 11,841,766
- Issue date Dec 12, 2023
- Micron Technology, Inc.
- Sujeet V. Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Routing assignments based on error correction capabilities
- Patent number 11,803,501
- Issue date Oct 31, 2023
- Micron Technology, Inc.
- Scott E. Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses, systems, and methods for identifying multi-bit errors
- Patent number 11,646,751
- Issue date May 9, 2023
- Micron Technology, Inc.
- Markus H. Geiger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory with a communications bus for device-to-controller communica...
- Patent number 11,625,343
- Issue date Apr 11, 2023
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for sketch circuits for refresh binning
- Patent number 11,600,314
- Issue date Mar 7, 2023
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses, systems, and methods for forced error check and scrub...
- Patent number 11,579,971
- Issue date Feb 14, 2023
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
APPARATUSES AND METHODS FOR READ/MODIFY/WRITE SINGLE-PASS METADATA...
- Publication number 20250110825
- Publication date Apr 3, 2025
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR GRANULAR SINGLE-PASS METADATA ACCESS OP...
- Publication number 20250111887
- Publication date Apr 3, 2025
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR SCALABLE 1-PASS ERROR CORRECTION CODE O...
- Publication number 20250112643
- Publication date Apr 3, 2025
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
APPARATUSES AND METHODS FOR ALTERNATE MEMORY DIE METADATA STORAGE
- Publication number 20250110830
- Publication date Apr 3, 2025
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR BOUNDED FAULT COMPLIANT METADATA STORAGE
- Publication number 20250110643
- Publication date Apr 3, 2025
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR HALF-PAGE MODES OF MEMORY DEVICES
- Publication number 20250078950
- Publication date Mar 6, 2025
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR HALF-PAGE MODES OF MEMORY DEVICES
- Publication number 20250077103
- Publication date Mar 6, 2025
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR HALF-PAGE MODES OF MEMORY DEVICES
- Publication number 20250077424
- Publication date Mar 6, 2025
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR HALF-PAGE MODES OF MEMORY DEVICES
- Publication number 20250078949
- Publication date Mar 6, 2025
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE WITH PER-CHANNEL ALERT OF ROW HAMMER AT...
- Publication number 20250078904
- Publication date Mar 6, 2025
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Application
BUFFER CONFIGURATIONS FOR COMMUNICATIONS BETWEEN MEMORY DIES AND A...
- Publication number 20250078884
- Publication date Mar 6, 2025
- Micron Technology, Inc.
- Sujeet V. Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Application
SIGNAL TIMING FOR A MEMORY DEVICE WITH A DIE HAVING MULTIPLE PSEUDO...
- Publication number 20250061056
- Publication date Feb 20, 2025
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE WITH A DIE HAVING MULTIPLE PSEUDO CHANNELS PER CHANNEL
- Publication number 20250061070
- Publication date Feb 20, 2025
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC AD HOC NETWORK INTERMEDIATE CLASSIFICATION SHARING
- Publication number 20250031020
- Publication date Jan 23, 2025
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- B60 - VEHICLES IN GENERAL
Information Patent Application
DYNAMIC AD HOC NETWORK RANGE DETERMINATION
- Publication number 20250031136
- Publication date Jan 23, 2025
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G08 - SIGNALLING
Information Patent Application
DYNAMIC AD HOC NETWORK ADJUSTMENT
- Publication number 20250031012
- Publication date Jan 23, 2025
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- B60 - VEHICLES IN GENERAL
Information Patent Application
DYNAMIC AD HOC NETWORK SIZE ADJUSTMENT
- Publication number 20250031088
- Publication date Jan 23, 2025
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DETECTION AND MITIGATION OF ATTACKS ON ROW HAMMER MITIGATION CIRCUITS
- Publication number 20240428846
- Publication date Dec 26, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE SECURITY AND ROW HAMMER MITIGATION
- Publication number 20240411466
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Yang Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAST BACKGROUND ARRAY PATTERN WRITING
- Publication number 20240404574
- Publication date Dec 5, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES, SYSTEMS, AND METHODS FOR MANAGING METADATA STORAGE AT...
- Publication number 20240321328
- Publication date Sep 26, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES, SYSTEMS, AND METHODS FOR STORING ERROR INFORMATION AND...
- Publication number 20240312553
- Publication date Sep 19, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS TO PERFORM DATA SWAPPING ON A HOST
- Publication number 20240311231
- Publication date Sep 19, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES, SYSTEMS, AND METHODS FOR STORING ERROR INFORMATION AND...
- Publication number 20240312550
- Publication date Sep 19, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES AND SYSTEMS CONFIGURED TO COMMUNICATE A DELAY SIGNAL...
- Publication number 20240312512
- Publication date Sep 19, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES, SYSTEMS, AND METHODS FOR STORING ERROR INFORMATION AND...
- Publication number 20240312547
- Publication date Sep 19, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR SELECTABLE EXPANSION OF ERROR CORRECTIO...
- Publication number 20240296096
- Publication date Sep 5, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR READ COMMANDS WITH DIFFERENT LEVELS OF...
- Publication number 20240296095
- Publication date Sep 5, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR VARIABLE INPUT ECC CIRCUITS
- Publication number 20240289217
- Publication date Aug 29, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR SETTINGS FOR ADJUSTABLE WRITE TIMING
- Publication number 20240289266
- Publication date Aug 29, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING

Sujeet Ayyapureddi

Person

Patents Grantslast 30 patents

Apparatus with memory process feedback

Row hammer interrupts to the operating system

Capability messaging for memory operations across banks with multip...

Aliased row hammer detector

Finite time counting period counting of infinite data streams

Apparatuses, systems, and methods for managing metadata security an...

Area-optimized row hammer mitigation

Buffer configurations for communications between memory dies and a...

Memory with memory-initiated command insertion, and associated syst...

Decoupling capacitors for semiconductor devices

Practical and efficient row hammer error detection

Apparatuses, systems, and methods for forced error check and scrub...

Memory operations across banks with multiple column access

Testing operations for memory systems

Memory device security and row hammer mitigation

Apparatuses, systems, and methods for per row error scrub information

Apparatuses, systems, and methods for managing metadata storage at...

Memory devices and systems configured to communicate a delay signal...

Dynamic row hammering threshold for memory

Apparatuses, systems, and methods for memory initiated calibration

Multiple bit error detection in scrub operations

Apparatuses and methods for bad row mode

Apparatuses, systems, and methods for resetting row hammer detector...

Scrub operations with row error information

Memory array error correction

Routing assignments based on error correction capabilities

Apparatuses, systems, and methods for identifying multi-bit errors

Memory with a communications bus for device-to-controller communica...

Apparatuses and methods for sketch circuits for refresh binning

Apparatuses, systems, and methods for forced error check and scrub...

Patents Applicationslast 30 patents

APPARATUSES AND METHODS FOR READ/MODIFY/WRITE SINGLE-PASS METADATA...

APPARATUSES AND METHODS FOR GRANULAR SINGLE-PASS METADATA ACCESS OP...

APPARATUSES AND METHODS FOR SCALABLE 1-PASS ERROR CORRECTION CODE O...

APPARATUSES AND METHODS FOR ALTERNATE MEMORY DIE METADATA STORAGE

APPARATUSES AND METHODS FOR BOUNDED FAULT COMPLIANT METADATA STORAGE

APPARATUSES AND METHODS FOR HALF-PAGE MODES OF MEMORY DEVICES

APPARATUSES AND METHODS FOR HALF-PAGE MODES OF MEMORY DEVICES

APPARATUSES AND METHODS FOR HALF-PAGE MODES OF MEMORY DEVICES

APPARATUSES AND METHODS FOR HALF-PAGE MODES OF MEMORY DEVICES

SEMICONDUCTOR MEMORY DEVICE WITH PER-CHANNEL ALERT OF ROW HAMMER AT...

BUFFER CONFIGURATIONS FOR COMMUNICATIONS BETWEEN MEMORY DIES AND A...

SIGNAL TIMING FOR A MEMORY DEVICE WITH A DIE HAVING MULTIPLE PSEUDO...

MEMORY DEVICE WITH A DIE HAVING MULTIPLE PSEUDO CHANNELS PER CHANNEL

DYNAMIC AD HOC NETWORK INTERMEDIATE CLASSIFICATION SHARING

DYNAMIC AD HOC NETWORK RANGE DETERMINATION

DYNAMIC AD HOC NETWORK ADJUSTMENT

DYNAMIC AD HOC NETWORK SIZE ADJUSTMENT

DETECTION AND MITIGATION OF ATTACKS ON ROW HAMMER MITIGATION CIRCUITS

MEMORY DEVICE SECURITY AND ROW HAMMER MITIGATION

FAST BACKGROUND ARRAY PATTERN WRITING

APPARATUSES, SYSTEMS, AND METHODS FOR MANAGING METADATA STORAGE AT...

APPARATUSES, SYSTEMS, AND METHODS FOR STORING ERROR INFORMATION AND...

APPARATUSES AND METHODS TO PERFORM DATA SWAPPING ON A HOST

APPARATUSES, SYSTEMS, AND METHODS FOR STORING ERROR INFORMATION AND...

MEMORY DEVICES AND SYSTEMS CONFIGURED TO COMMUNICATE A DELAY SIGNAL...

APPARATUSES, SYSTEMS, AND METHODS FOR STORING ERROR INFORMATION AND...

APPARATUSES AND METHODS FOR SELECTABLE EXPANSION OF ERROR CORRECTIO...

APPARATUSES AND METHODS FOR READ COMMANDS WITH DIFFERENT LEVELS OF...

APPARATUSES AND METHODS FOR VARIABLE INPUT ECC CIRCUITS

APPARATUSES AND METHODS FOR SETTINGS FOR ADJUSTABLE WRITE TIMING