Sumiko Maeda

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Kawasaki, JP

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Patents Grantslast 30 patents

Information Patent Grant
Logic verification device, logic verification method and logic veri...
- Patent number 7,131,086
- Issue date Oct 31, 2006
- Fujitsu Limited
- Junya Yamasaki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for making electronic circuit design data and CAD system usi...
- Patent number 5,856,925
- Issue date Jan 5, 1999
- Fujitsu Limited
- Sumiko Maeda
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Logic verification device, logic verification method and logic veri...
- Publication number 20050229122
- Publication date Oct 13, 2005
- FUJITSU LIMITED
- Junya Yamasaki
- G06 - COMPUTING CALCULATING COUNTING