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Sumit Roy
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Evanston, IL, US
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last 30 patents
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Patent Grant
Method and mechanism for RTL power optimization
Patent number
7,007,247
Issue date
Feb 28, 2006
Cadence Design Systems, Inc.
Qi Wang
G06 - COMPUTING CALCULATING COUNTING
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Patent Grant
Cluster matching for circuit implementation
Patent number
6,023,566
Issue date
Feb 8, 2000
Cadence Design Systems
Krishna Belkhale
G06 - COMPUTING CALCULATING COUNTING
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Patent Grant
Cluster determination for circuit implementation
Patent number
5,991,524
Issue date
Nov 23, 1999
Cadence Design Systems
Krishna Belkhale
G06 - COMPUTING CALCULATING COUNTING