Sundarrajan Rangachari

Person

Ulsoor, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Low power digital modes for duty-cycled integrated transceivers
- Patent number 12,160,259
- Issue date Dec 3, 2024
- Texas Instruments Incorporated
- Sundarrajan Rangachari
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low-complexity inverse sinc for RF sampling transmitters
- Patent number 11,757,475
- Issue date Sep 12, 2023
- Texas Instruments Incorporated
- Jaiganesh Balakrishnan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Transition fault testing of functionally asynchronous paths in an i...
- Patent number 11,709,203
- Issue date Jul 25, 2023
- Texas Instruments Incorporated
- Prakash Narayanan
- G01 - MEASURING TESTING
Information Patent Grant
Methods and systems for generation of balanced secondary clocks fro...
- Patent number 11,422,586
- Issue date Aug 23, 2022
- Texas Instruments Incorporated
- Aswath Vs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Self test for safety logic
- Patent number 11,320,488
- Issue date May 3, 2022
- Texas Instruments Incorporated
- Sundarrajan Rangachari
- G01 - MEASURING TESTING
Information Patent Grant
Transistion fault testing of funtionally asynchronous paths in an i...
- Patent number 11,300,615
- Issue date Apr 12, 2022
- Texas Instruments Incorporated
- Prakash Narayanan
- G01 - MEASURING TESTING
Information Patent Grant
Transition fault test (TFT) clock receiver system
- Patent number 11,204,385
- Issue date Dec 21, 2021
- Texas Instruments Incorporated
- Gautam Sanjay Kale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low-complexity inverse sinc for RF sampling transmitters
- Patent number 11,171,674
- Issue date Nov 9, 2021
- Texas Instruments Incorporated
- Jaiganesh Balakrishnan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Frequency-domain IQ mismatch estimation
- Patent number 11,095,485
- Issue date Aug 17, 2021
- Texas Instruments Incorporated
- Jawaharlal Tangudu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Self test for safety logic
- Patent number 10,935,602
- Issue date Mar 2, 2021
- Texas Instruments Incorporated
- Sundarrajan Rangachari
- G01 - MEASURING TESTING
Information Patent Grant
Digital clock generation with randomized division of a source clock
- Patent number 10,911,057
- Issue date Feb 2, 2021
- Texas Instruments Incorporated
- Sarma Sundareswara Gunturi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dithered M by N clock dividers
- Patent number 10,812,091
- Issue date Oct 20, 2020
- Texas Instruments Incorporated
- Sundarrajan Rangachari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock pulse generator
- Patent number 10,651,836
- Issue date May 12, 2020
- Texas Instruments Incorporated
- Gautam Sanjay Kale
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dithered M by N clock dividers
- Patent number 10,651,863
- Issue date May 12, 2020
- Texas Instruments Incorporated
- Sundarrajan Rangachari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital downconverter with digital oscillator frequency error corre...
- Patent number 10,574,246
- Issue date Feb 25, 2020
- Texas Instruments Incorporated
- Sarma Sundareswara Gunturi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Transformation based filter for interpolation or decimation
- Patent number 10,396,829
- Issue date Aug 27, 2019
- TEXAS INTSTUMENTS INCORPORATED
- Jaiganesh Balakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory compression operable for non-contiguous write/read addresses
- Patent number 10,320,412
- Issue date Jun 11, 2019
- Texas Instruments Incorporated
- Sundarrajan Rangachari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplier-based programmable filters
- Patent number 10,305,451
- Issue date May 28, 2019
- Texas Instruments Incorporated
- Sundarrajan Rangachari
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Transformation based filter for interpolation or decimation
- Patent number 10,090,866
- Issue date Oct 2, 2018
- Texas Instruments Incorporated
- Jaiganesh Balakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Self test for safety logic
- Patent number 9,964,597
- Issue date May 8, 2018
- Texas Instruments Incorporated
- Sundarrajan Rangachari
- G01 - MEASURING TESTING
Information Patent Grant
Memory compression operable for non-contiguous write/read addresses
- Patent number 9,929,744
- Issue date Mar 27, 2018
- Texas Instruments Incorporated
- Sundarrajan Rangachari
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory compression operable for non-contiguous write/read addresses
- Patent number 9,793,918
- Issue date Oct 17, 2017
- Texas Instruments Incorporated
- Sundarrajan Rangachari
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Weather band receiver
- Patent number 9,680,677
- Issue date Jun 13, 2017
- Texas Instruments Incorporated
- Sriram Murali
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Systems and methods of variable fractional rate digital resampling
- Patent number 9,531,343
- Issue date Dec 27, 2016
- Texas Instruments Incorporated
- Jawaharlal Tangudu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Direct over-sampled pulse shaping circuit with flip flops and LUT
- Patent number 9,491,012
- Issue date Nov 8, 2016
- Texas Instruments Incorporated
- Jaiganesh Balakrishnan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Current reduction in digital circuits
- Patent number 9,025,705
- Issue date May 5, 2015
- Texas Instruments Incorporated
- Sundarrajan Rangachari
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Apparatus and method for reducing interference signals in an integr...
- Patent number 8,842,766
- Issue date Sep 23, 2014
- Texas Instruments Incorporated
- Indu Prathapan
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Methods and Systems for Generation of Balanced Secondary Clocks fro...
- Publication number 20220271762
- Publication date Aug 25, 2022
- TEXAS INSTRUMENTS INCORPORATED
- Aswath Vs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSISTION FAULT TESTING OF FUNTIONALLY ASYNCHRONOUS PATHS IN AN I...
- Publication number 20220196738
- Publication date Jun 23, 2022
- TEXAS INSTRUMENTS INCORPORATED
- PRAKASH NARAYANAN
- G01 - MEASURING TESTING
Information Patent Application
LOW POWER DIGITAL MODES FOR DUTY-CYCLED INTEGRATED TRANSCEIVERS
- Publication number 20220182098
- Publication date Jun 9, 2022
- TEXAS INSTRUMENTS INCORPORATED
- Sundarrajan RANGACHARI
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
LOW-COMPLEXITY INVERSE SINC FOR RF SAMPLING TRANSMITTERS
- Publication number 20220029644
- Publication date Jan 27, 2022
- TEXAS INSTRUMENTS INCORPORATED
- Jaiganesh Balakrishnan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TRANSITION FAULT TEST (TFT) CLOCK RECEIVER SYSTEM
- Publication number 20210148974
- Publication date May 20, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Gautam Sanjy Kale
- G01 - MEASURING TESTING
Information Patent Application
Self Test for Safety Logic
- Publication number 20210148976
- Publication date May 20, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Sundarrajan Rangachari
- G01 - MEASURING TESTING
Information Patent Application
LOW-COMPLEXITY INVERSE SINC FOR RF SAMPLING TRANSMITTERS
- Publication number 20210083695
- Publication date Mar 18, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Jaiganesh Balakrishnan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DITHERED M BY N CLOCK DIVIDERS
- Publication number 20200228126
- Publication date Jul 16, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Sundarrajan RANGACHARI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FREQUENCY-DOMAIN IQ MISMATCH ESTIMATION
- Publication number 20200177417
- Publication date Jun 4, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Jawaharlal TANGUDU
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CLOCK PULSE GENERATOR
- Publication number 20200177170
- Publication date Jun 4, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Gautam Sanjay KALE
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DITHERED M BY N CLOCK DIVIDERS
- Publication number 20200162083
- Publication date May 21, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Sundarrajan RANGACHARI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIGITAL CLOCK GENERATION WITH RANDOMIZED DIVISION OF A SOURCE CLOCK
- Publication number 20200153444
- Publication date May 14, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Sarma Sundareswara Gunturi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TRANSISTION FAULT TESTING OF FUNTIONALLY ASYNCHRONOUS PATHS IN AN I...
- Publication number 20190204387
- Publication date Jul 4, 2019
- TEXAS INSTRUMENTS INCORPORATED
- PRAKASH NARAYANAN
- G01 - MEASURING TESTING
Information Patent Application
DIGITAL DOWNCONVERTER WITH DIGITAL OSCILLATOR FREQUENCY ERROR CORRE...
- Publication number 20190207612
- Publication date Jul 4, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Sarma Sundareswara GUNTURI
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MULTIPLIER-BASED PROGRAMMABLE FILTERS
- Publication number 20190181842
- Publication date Jun 13, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Sundarrajan RANGACHARI
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Transformation Based Filter for Interpolation or Decimation
- Publication number 20180367169
- Publication date Dec 20, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Jaiganesh Balakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Self Test for Safety Logic
- Publication number 20180252771
- Publication date Sep 6, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Sundarrajan Rangachari
- G01 - MEASURING TESTING
Information Patent Application
TRANSFORMATION BASED FILTER FOR INTERPOLATION OR DECIMATION
- Publication number 20180191383
- Publication date Jul 5, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Jaiganesh Balakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY COMPRESSION OPERABLE FOR NON-CONTIGUOUS WRITE/READ ADDRESSES
- Publication number 20180175880
- Publication date Jun 21, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Sundarrajan RANGACHARI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Self Test for Safety Logic
- Publication number 20180059180
- Publication date Mar 1, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Sundarrajan Rangachari
- G01 - MEASURING TESTING
Information Patent Application
MEMORY COMPRESSION OPERABLE FOR NON-CONTIGUOUS WRITE/READ ADDRESSES
- Publication number 20180041222
- Publication date Feb 8, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Sundarrajan RANGACHARI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and Methods of Variable Fractional Rate Digital Resampling
- Publication number 20160277007
- Publication date Sep 22, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Jawaharlal Tangudu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Weather Band Receiver
- Publication number 20160127161
- Publication date May 5, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Sriram Murali
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Memory Compression Operable for Non-contiguous write/read Addresses
- Publication number 20160110113
- Publication date Apr 21, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Sundarrajan Rangachari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CURRENT REDUCTION IN DIGITAL CIRCUITS
- Publication number 20140098908
- Publication date Apr 10, 2014
- TEXAS INSTRUMENTS INCORPORATED
- SUNDARRAJAN RANGACHARI
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEM AND METHOD FOR MITIGATING FREQUENCY MISMATCH IN A RECEIVER S...
- Publication number 20130066451
- Publication date Mar 14, 2013
- Aravind Na Ganesan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
APPARATUS AND METHOD FOR REDUCING INTERFERENCE SIGNALS IN AN INTEGR...
- Publication number 20110241747
- Publication date Oct 6, 2011
- INDU PRATHAPAN
- G06 - COMPUTING CALCULATING COUNTING

Sundarrajan Rangachari

Person

Patents Grantslast 30 patents

Low power digital modes for duty-cycled integrated transceivers

Low-complexity inverse sinc for RF sampling transmitters

Transition fault testing of functionally asynchronous paths in an i...

Methods and systems for generation of balanced secondary clocks fro...

Self test for safety logic

Transistion fault testing of funtionally asynchronous paths in an i...

Transition fault test (TFT) clock receiver system

Low-complexity inverse sinc for RF sampling transmitters

Frequency-domain IQ mismatch estimation

Self test for safety logic

Digital clock generation with randomized division of a source clock

Dithered M by N clock dividers

Clock pulse generator

Dithered M by N clock dividers

Digital downconverter with digital oscillator frequency error corre...

Transformation based filter for interpolation or decimation

Memory compression operable for non-contiguous write/read addresses

Multiplier-based programmable filters

Transformation based filter for interpolation or decimation

Self test for safety logic

Memory compression operable for non-contiguous write/read addresses

Memory compression operable for non-contiguous write/read addresses

Weather band receiver

Systems and methods of variable fractional rate digital resampling

Direct over-sampled pulse shaping circuit with flip flops and LUT

Current reduction in digital circuits

Apparatus and method for reducing interference signals in an integr...

Patents Applicationslast 30 patents

Methods and Systems for Generation of Balanced Secondary Clocks fro...

TRANSISTION FAULT TESTING OF FUNTIONALLY ASYNCHRONOUS PATHS IN AN I...

LOW POWER DIGITAL MODES FOR DUTY-CYCLED INTEGRATED TRANSCEIVERS

LOW-COMPLEXITY INVERSE SINC FOR RF SAMPLING TRANSMITTERS

TRANSITION FAULT TEST (TFT) CLOCK RECEIVER SYSTEM

Self Test for Safety Logic

LOW-COMPLEXITY INVERSE SINC FOR RF SAMPLING TRANSMITTERS

DITHERED M BY N CLOCK DIVIDERS

FREQUENCY-DOMAIN IQ MISMATCH ESTIMATION

CLOCK PULSE GENERATOR

DITHERED M BY N CLOCK DIVIDERS

DIGITAL CLOCK GENERATION WITH RANDOMIZED DIVISION OF A SOURCE CLOCK

TRANSISTION FAULT TESTING OF FUNTIONALLY ASYNCHRONOUS PATHS IN AN I...

DIGITAL DOWNCONVERTER WITH DIGITAL OSCILLATOR FREQUENCY ERROR CORRE...

MULTIPLIER-BASED PROGRAMMABLE FILTERS

Transformation Based Filter for Interpolation or Decimation

Self Test for Safety Logic

TRANSFORMATION BASED FILTER FOR INTERPOLATION OR DECIMATION

MEMORY COMPRESSION OPERABLE FOR NON-CONTIGUOUS WRITE/READ ADDRESSES

Self Test for Safety Logic

MEMORY COMPRESSION OPERABLE FOR NON-CONTIGUOUS WRITE/READ ADDRESSES

Systems and Methods of Variable Fractional Rate Digital Resampling

Weather Band Receiver

Memory Compression Operable for Non-contiguous write/read Addresses

CURRENT REDUCTION IN DIGITAL CIRCUITS

SYSTEM AND METHOD FOR MITIGATING FREQUENCY MISMATCH IN A RECEIVER S...

APPARATUS AND METHOD FOR REDUCING INTERFERENCE SIGNALS IN AN INTEGR...