Sunil PURANIK

Person

Pune, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Low-latency FPGA framework based on reliable UDP and TCP re-assembl...
- Patent number 11,736,594
- Issue date Aug 22, 2023
- TATA Consultancy Services Limited
- Dhaval Shah
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Synthesizing printf and scanf statements for generating debug messa...
- Patent number 11,714,742
- Issue date Aug 1, 2023
- TATA Consultancy Services Limited
- Mahesh Damodar Barve
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Re-assembly middleware in FPGA for processing TCP segments into app...
- Patent number 11,611,638
- Issue date Mar 21, 2023
- TATA Consultancy Services Limited
- Dhaval Shah
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Systems and methods for storing data in an integrated array and lin...
- Patent number 11,263,203
- Issue date Mar 1, 2022
- TATA Consultancy Services Limited
- Mahesh Damodar Barve
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple field programmable gate array (FPGA) based multi-legged or...
- Patent number 11,263,164
- Issue date Mar 1, 2022
- Tata Consultancy Services Lmited
- Mahesh Damodar Barve
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for message based communication and failure recov...
- Patent number 11,212,218
- Issue date Dec 28, 2021
- TATA Consultancy Services Limited
- Manoj Karunakaran Nambiar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Exactly-once transaction semantics for fault tolerant FPGA based tr...
- Patent number 10,965,519
- Issue date Mar 30, 2021
- TATA Consultancy Services Limited
- Manoj Karunakaran Nambiar
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
LOW-LATENCY FPGA FRAMEWORK BASED ON RELIABLE UDP AND TCP RE-ASSEMBL...
- Publication number 20220311839
- Publication date Sep 29, 2022
- TATA CONSULTANCY SERVICES LIMITED
- Dhaval SHAH
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
RE-ASSEMBLY MIDDLEWARE IN FPGA FOR PROCESSING TCP SEGMENTS INTO APP...
- Publication number 20220272178
- Publication date Aug 25, 2022
- TATA CONSULTANCY SERVICES LIMITED
- Dhaval SHAH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE FIELD PROGRAMMABLE GATE ARRAY (FPGA) BASED MULTI-LEGGED OR...
- Publication number 20220083492
- Publication date Mar 17, 2022
- TATA CONSULTANCY SERVICES LIMITED
- Mahesh Damodar BARVE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYNTHESIZING PRINTF AND SCANF STATEMENTS FOR GENERATING DEBUG MESSA...
- Publication number 20210232486
- Publication date Jul 29, 2021
- TATA CONSULTANCY SERVICES LIMITED
- Mahesh Damodar BARVE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR STORING DATA IN AN INTEGRATED ARRAY AND LIN...
- Publication number 20200133942
- Publication date Apr 30, 2020
- TATA CONSULTANCY SERVICES LIMITED
- Mahesh Damodar BARVE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR MESSAGE BASED COMMUNICATION AND FAILURE RECOV...
- Publication number 20200053004
- Publication date Feb 13, 2020
- TATA CONSULTANCY SERVICES LIMITED
- Manoj Karunakaran NAMBIAR
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
EXACTLY-ONCE TRANSACTION SEMANTICS FOR FAULT TOLERANT FPGA BASED TR...
- Publication number 20190296964
- Publication date Sep 26, 2019
- TATA CONSULTANCY SERVICES LIMITED
- Manoj Karunakaran NAMBIAR
- G06 - COMPUTING CALCULATING COUNTING

Sunil PURANIK

Person

Patents Grantslast 30 patents

Low-latency FPGA framework based on reliable UDP and TCP re-assembl...

Synthesizing printf and scanf statements for generating debug messa...

Re-assembly middleware in FPGA for processing TCP segments into app...

Systems and methods for storing data in an integrated array and lin...

Multiple field programmable gate array (FPGA) based multi-legged or...

Method and system for message based communication and failure recov...

Exactly-once transaction semantics for fault tolerant FPGA based tr...

Patents Applicationslast 30 patents

LOW-LATENCY FPGA FRAMEWORK BASED ON RELIABLE UDP AND TCP RE-ASSEMBL...

RE-ASSEMBLY MIDDLEWARE IN FPGA FOR PROCESSING TCP SEGMENTS INTO APP...

MULTIPLE FIELD PROGRAMMABLE GATE ARRAY (FPGA) BASED MULTI-LEGGED OR...

SYNTHESIZING PRINTF AND SCANF STATEMENTS FOR GENERATING DEBUG MESSA...

SYSTEMS AND METHODS FOR STORING DATA IN AN INTEGRATED ARRAY AND LIN...

METHOD AND SYSTEM FOR MESSAGE BASED COMMUNICATION AND FAILURE RECOV...

EXACTLY-ONCE TRANSACTION SEMANTICS FOR FAULT TOLERANT FPGA BASED TR...