Sunil RAFEEQUE

Person

Bangalore, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Piecewise correction of errors over temperature without using on-ch...
- Patent number 12,265,414
- Issue date Apr 1, 2025
- Texas Instruments Incorporated
- Praful Kumar Parakh
- G05 - CONTROLLING REGULATING
Information Patent Grant
Piecewise correction of errors over temperature without using on-ch...
- Patent number 11,409,317
- Issue date Aug 9, 2022
- Texas Instruments Incorporated
- Praful Kumar Parakh
- G05 - CONTROLLING REGULATING
Information Patent Grant
Monolithic reference architecture with burst mode support
- Patent number 10,054,969
- Issue date Aug 21, 2018
- Texas Instruments Incorporated
- Anand Subramanian
- G05 - CONTROLLING REGULATING
Information Patent Grant
Piecewise correction of errors over temperature without using on-ch...
- Patent number 9,971,375
- Issue date May 15, 2018
- Texas Instruments Incorporated
- Praful Kumar Parakh
- G05 - CONTROLLING REGULATING
Information Patent Grant
Area and power efficient, high swing and monolitihic ground centere...
- Patent number 8,004,366
- Issue date Aug 23, 2011
- Texas Instruments Incorporated
- Sunil Rafeeque
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Biasing scheme for low-voltage MOS cascode current mirrors
- Patent number 7,639,081
- Issue date Dec 29, 2009
- Texas Instuments Incorporated
- Abhijith Arakali
- G05 - CONTROLLING REGULATING

Patents Applicationslast 30 patents

Information Patent Application
Piecewise Correction of Errors Over Temperature without Using On-Ch...
- Publication number 20220350360
- Publication date Nov 3, 2022
- TEXAS INSTRUMENTS INCORPORATED
- Praful Kumar PARAKH
- G05 - CONTROLLING REGULATING
Information Patent Application
Piecewise Correction of Errors Over Temperature without Using On-Ch...
- Publication number 20180239383
- Publication date Aug 23, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Praful Kumar PARAKH
- G05 - CONTROLLING REGULATING
Information Patent Application
PIECEWISE CORRECTION OF ERRORS OVER TEMPERATURE WITHOUT USING ON-CH...
- Publication number 20170083038
- Publication date Mar 23, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Praful Kumar PARAKH
- G05 - CONTROLLING REGULATING
Information Patent Application
MONOLITHIC REFERENCE ARCHITECTURE WITH BURST MODE SUPPORT
- Publication number 20170068265
- Publication date Mar 9, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Anand SUBRAMANIAN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MINIMAL AREA, POWER EFFICIENT, HIGH SWING AND MONOLITIHIC GROUND CE...
- Publication number 20110102082
- Publication date May 5, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Sunil RAFEEQUE
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Biasing Scheme for Low-Voltage MOS Cascode Current Mirrors
- Publication number 20080186101
- Publication date Aug 7, 2008
- TEXAS INSTRUMENTS INCORPORATED
- Abhijith Arakali
- G05 - CONTROLLING REGULATING

Sunil RAFEEQUE

Person

Patents Grantslast 30 patents

Piecewise correction of errors over temperature without using on-ch...

Piecewise correction of errors over temperature without using on-ch...

Monolithic reference architecture with burst mode support

Piecewise correction of errors over temperature without using on-ch...

Area and power efficient, high swing and monolitihic ground centere...

Biasing scheme for low-voltage MOS cascode current mirrors

Patents Applicationslast 30 patents

Piecewise Correction of Errors Over Temperature without Using On-Ch...

Piecewise Correction of Errors Over Temperature without Using On-Ch...

PIECEWISE CORRECTION OF ERRORS OVER TEMPERATURE WITHOUT USING ON-CH...

MONOLITHIC REFERENCE ARCHITECTURE WITH BURST MODE SUPPORT

MINIMAL AREA, POWER EFFICIENT, HIGH SWING AND MONOLITIHIC GROUND CE...

Biasing Scheme for Low-Voltage MOS Cascode Current Mirrors