Sunil SUDHAKARAN

Person

San Francisco, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Hardware-efficient PAM-3 encoder and decoder
- Patent number 12,135,607
- Issue date Nov 5, 2024
- NVIDIA Corp.
- Gautam Bhatia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware-efficient PAM-3 encoder and decoder
- Patent number 12,132,590
- Issue date Oct 29, 2024
- NVIDIA, Corp.
- Sunil Sudhakaran
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
On-chip virtual oscilloscope using high-speed receiver sampler read...
- Patent number 11,695,601
- Issue date Jul 4, 2023
- NVIDIA Corporation
- Sunil Rao Sudhakaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for data scrambling on a memory interface
- Patent number 11,573,854
- Issue date Feb 7, 2023
- NVIDIA Corporation
- Gautam Bhatia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Via pattern for framebuffer interfaces
- Patent number 11,439,010
- Issue date Sep 6, 2022
- NVIDIA Corporation
- Baal Yang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Codebook to reduce error growth arising from channel errors
- Patent number 10,979,176
- Issue date Apr 13, 2021
- NVIDIA Corp.
- Sunil Sudhakaran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Systematic methodology to remove reflections from I/O measurements
- Patent number 10,901,017
- Issue date Jan 26, 2021
- NVIDIA Corporation
- Sunil Sudhakaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Resistance and capacitance balancing systems and methods
- Patent number 10,685,925
- Issue date Jun 16, 2020
- NVIDIA Corporation
- Jim Dobbins
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Bus-invert coding with restricted hamming distance for multi-byte i...
- Patent number 10,623,200
- Issue date Apr 14, 2020
- NVIDIA Corp.
- John Wilson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cross talk reduction differential cross over routing systems and me...
- Patent number 10,600,730
- Issue date Mar 24, 2020
- NVIDIA Corporation
- Jim Dobbins
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Maximum transition avoidance (MTA) encoding
- Patent number 10,594,337
- Issue date Mar 17, 2020
- NVIDIA Corp.
- Sunil Sudhakaran
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Maximum transition avoidance (MTA) encoding
- Patent number 10,491,238
- Issue date Nov 26, 2019
- NVIDIA Corp.
- Sunil Sudhakaran
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Mode-changeable dual data rate random access memory driver with asy...
- Patent number 10,074,411
- Issue date Sep 11, 2018
- NVIDIA Corporation
- Daehyun Chung
- G11 - INFORMATION STORAGE
Information Patent Grant
Via pattern to reduce crosstalk between differential signal pairs
- Patent number 10,032,710
- Issue date Jul 24, 2018
- NVIDIA Corporation
- Seunghyun Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
8b/9b decoding for reducing crosstalk on a high speed parallel bus
- Patent number 8,638,241
- Issue date Jan 28, 2014
- NVIDIA Corporation
- Sunil Sudhakaran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
8b/9b encoding for reducing crosstalk on a high speed parallel bus
- Patent number 8,614,634
- Issue date Dec 24, 2013
- NVIDIA Corporation
- Sunil Sudhakaran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
HARDWARE-EFFICIENT PAM-3 ENCODER AND DECODER
- Publication number 20230418705
- Publication date Dec 28, 2023
- NVIDIA Corp.
- Gautam Bhatia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE-EFFICIENT PAM-3 ENCODER AND DECODER
- Publication number 20230327924
- Publication date Oct 12, 2023
- NVIDIA Corp.
- Sunil Sudhakaran
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HARDWARE-EFFICIENT PAM-3 ENCODER AND DECODER
- Publication number 20230297466
- Publication date Sep 21, 2023
- NVIDIA Corp.
- Gautam Bhatia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ON-CHIP VIRTUAL OSCILLOSCOPE USING HIGH-SPEED RECEIVER SAMPLER READ...
- Publication number 20230052588
- Publication date Feb 16, 2023
- NVIDIA Corporation
- Sunil Rao Sudhakaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR DETECTION PIN ENCODING SCHEME TO AVOID MAXIMUM TRANSITIONS AN...
- Publication number 20220262447
- Publication date Aug 18, 2022
- NVIDIA Corp.
- Sunil Sudhakaran
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR DATA SCRAMBLING ON A MEMORY INTERFACE
- Publication number 20220245025
- Publication date Aug 4, 2022
- NVIDIA Corporation
- Gautam BHATIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIA PATTERN FOR FRAMEBUFFER INTERFACES
- Publication number 20210243895
- Publication date Aug 5, 2021
- NVIDIA Corporation
- Baal Yang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
BUS-INVERT CODING WITH RESTRICTED HAMMING DISTANCE FOR MULTI-BYTE I...
- Publication number 20200028708
- Publication date Jan 23, 2020
- NVIDIA Corp.
- John Wilson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MAXIMUM TRANSITION AVOIDANCE (MTA) ENCODING
- Publication number 20190386677
- Publication date Dec 19, 2019
- NVIDIA Corp.
- Sunil Sudhakaran
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
RESISTANCE AND CAPACITANCE BALANCING SYSTEMS AND METHODS
- Publication number 20190237417
- Publication date Aug 1, 2019
- NVIDIA Corporation
- Jim Dobbins
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CROSS TALK REDUCTION DIFFERENTIAL CROSS OVER ROUTING SYSTEMS AND ME...
- Publication number 20190237399
- Publication date Aug 1, 2019
- NVIDIA Corporation
- Jim Dobbins
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MAXIMUM TRANSITION AVOIDANCE (MTA) ENCODING
- Publication number 20190229749
- Publication date Jul 25, 2019
- NVIDIA Corp.
- Sunil Sudhakaran
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEMATIC METHODOLOGY TO REMOVE REFLECTIONS FROM I/O MEASUREMENTS
- Publication number 20190049496
- Publication date Feb 14, 2019
- NVIDIA Corporation
- Sunil Sudhakaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIA PATTERN TO REDUCE CROSSTALK BETWEEN DIFFERENTIAL SIGNAL PAIRS
- Publication number 20170025345
- Publication date Jan 26, 2017
- NVIDIA Corporation
- Seunghyun HWANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MODE-CHANGEABLE DUAL DATA RATE RANDOM ACCESS MEMORY DRIVER WITH ASY...
- Publication number 20150213855
- Publication date Jul 30, 2015
- NVIDIA Corporation
- Daehyun Chung
- G11 - INFORMATION STORAGE
Information Patent Application
8B/9B Encoding For Reducing Crosstalk on a High Speed Parallel Bus
- Publication number 20130266046
- Publication date Oct 10, 2013
- Sunil SUDHAKARAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
8B/9B DECODING FOR REDUCING CROSSTALK ON A HIGH SPEED PARALLEL BUS
- Publication number 20130266047
- Publication date Oct 10, 2013
- NVIDIA Corporation
- Sunil SUDHAKARAN
- G06 - COMPUTING CALCULATING COUNTING

Sunil SUDHAKARAN

Person

Patents Grantslast 30 patents

Hardware-efficient PAM-3 encoder and decoder

Hardware-efficient PAM-3 encoder and decoder

On-chip virtual oscilloscope using high-speed receiver sampler read...

Techniques for data scrambling on a memory interface

Via pattern for framebuffer interfaces

Codebook to reduce error growth arising from channel errors

Systematic methodology to remove reflections from I/O measurements

Resistance and capacitance balancing systems and methods

Bus-invert coding with restricted hamming distance for multi-byte i...

Cross talk reduction differential cross over routing systems and me...

Maximum transition avoidance (MTA) encoding

Maximum transition avoidance (MTA) encoding

Mode-changeable dual data rate random access memory driver with asy...

Via pattern to reduce crosstalk between differential signal pairs

8b/9b decoding for reducing crosstalk on a high speed parallel bus

8b/9b encoding for reducing crosstalk on a high speed parallel bus

Patents Applicationslast 30 patents

HARDWARE-EFFICIENT PAM-3 ENCODER AND DECODER

HARDWARE-EFFICIENT PAM-3 ENCODER AND DECODER

HARDWARE-EFFICIENT PAM-3 ENCODER AND DECODER

ON-CHIP VIRTUAL OSCILLOSCOPE USING HIGH-SPEED RECEIVER SAMPLER READ...

ERROR DETECTION PIN ENCODING SCHEME TO AVOID MAXIMUM TRANSITIONS AN...

TECHNIQUES FOR DATA SCRAMBLING ON A MEMORY INTERFACE

VIA PATTERN FOR FRAMEBUFFER INTERFACES

BUS-INVERT CODING WITH RESTRICTED HAMMING DISTANCE FOR MULTI-BYTE I...

MAXIMUM TRANSITION AVOIDANCE (MTA) ENCODING

RESISTANCE AND CAPACITANCE BALANCING SYSTEMS AND METHODS

CROSS TALK REDUCTION DIFFERENTIAL CROSS OVER ROUTING SYSTEMS AND ME...

MAXIMUM TRANSITION AVOIDANCE (MTA) ENCODING

SYSTEMATIC METHODOLOGY TO REMOVE REFLECTIONS FROM I/O MEASUREMENTS

VIA PATTERN TO REDUCE CROSSTALK BETWEEN DIFFERENTIAL SIGNAL PAIRS

MODE-CHANGEABLE DUAL DATA RATE RANDOM ACCESS MEMORY DRIVER WITH ASY...

8B/9B Encoding For Reducing Crosstalk on a High Speed Parallel Bus

8B/9B DECODING FOR REDUCING CROSSTALK ON A HIGH SPEED PARALLEL BUS