Supratik Majumder

Person

Bangalore, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Multi-level system memory with near memory capable of storing compr...
- Patent number 11,188,467
- Issue date Nov 30, 2021
- Intel Corporation
- Israel Diamand
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Create page locality in cache controller cache allocation
- Patent number 10,635,593
- Issue date Apr 28, 2020
- Intel Corporation
- Daniel Greenspan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using data pattern to mark cache lines as invalid
- Patent number 10,176,099
- Issue date Jan 8, 2019
- Intel Corporation
- Jayesh Gaur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Create page locality in cache controller cache allocation
- Patent number 9,846,648
- Issue date Dec 19, 2017
- Intel Corporation
- Daniel Greenspan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adjustable over-restrictive cache locking limit for improved overal...
- Patent number 9,542,325
- Issue date Jan 10, 2017
- Intel Corporation
- Daniel Greenspan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Identification of GPU phase to determine GPU scalability during run...
- Patent number 9,424,620
- Issue date Aug 23, 2016
- Intel Corporation
- Idan Mondjak
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Adjustable over-restrictive cache locking limit for improved overal...
- Patent number 9,396,120
- Issue date Jul 19, 2016
- Intel Corporation
- Daniel Greenspan
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MULTI-LEVEL SYSTEM MEMORY WITH NEAR MEMORY CAPABLE OF STORING COMPR...
- Publication number 20210056030
- Publication date Feb 25, 2021
- Intel Corporation
- Israel DIAMAND
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT SECTOR PREFETCHING FOR MEMORY SIDE SECTORED CACHE
- Publication number 20190213130
- Publication date Jul 11, 2019
- Intel Corporation
- Srinivas Santosh Kumar Madugula
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-LEVEL SYSTEM MEMORY WITH NEAR MEMORY CAPABLE OF STORING COMPR...
- Publication number 20190095331
- Publication date Mar 28, 2019
- Intel Corporation
- Israel DIAMAND
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CREATE PAGE LOCALITY IN CACHE CONTROLLER CACHE ALLOCATION
- Publication number 20180046579
- Publication date Feb 15, 2018
- Intel Corporation
- Daniel Greenspan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USING DATA PATTERN TO MARK CACHE LINES AS INVALID
- Publication number 20180011790
- Publication date Jan 11, 2018
- Intel Corporation
- Jayesh Gaur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CREATE PAGE LOCALITY IN CACHE CONTROLLER CACHE ALLOCATION
- Publication number 20160335187
- Publication date Nov 17, 2016
- Intel Corporation
- Daniel Greenspan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADJUSTABLE OVER-RESTRICTIVE CACHE LOCKING LIMIT FOR IMPROVED OVERAL...
- Publication number 20160328327
- Publication date Nov 10, 2016
- Intel Corporation
- Daniel Greenspan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADJUSTABLE OVER-RESTRICTIVE CACHE LOCKING LIMIT FOR IMPROVED OVERAL...
- Publication number 20160179681
- Publication date Jun 23, 2016
- Daniel Greenspan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE ADMISSION CONTROL FOR ON DIE INTERCONNECT
- Publication number 20150188797
- Publication date Jul 2, 2015
- Guy Satat
- G06 - COMPUTING CALCULATING COUNTING

Supratik Majumder

Person

Patents Grantslast 30 patents

Multi-level system memory with near memory capable of storing compr...

Create page locality in cache controller cache allocation

Using data pattern to mark cache lines as invalid

Create page locality in cache controller cache allocation

Adjustable over-restrictive cache locking limit for improved overal...

Identification of GPU phase to determine GPU scalability during run...

Adjustable over-restrictive cache locking limit for improved overal...

Patents Applicationslast 30 patents

MULTI-LEVEL SYSTEM MEMORY WITH NEAR MEMORY CAPABLE OF STORING COMPR...

EFFICIENT SECTOR PREFETCHING FOR MEMORY SIDE SECTORED CACHE

MULTI-LEVEL SYSTEM MEMORY WITH NEAR MEMORY CAPABLE OF STORING COMPR...

CREATE PAGE LOCALITY IN CACHE CONTROLLER CACHE ALLOCATION

USING DATA PATTERN TO MARK CACHE LINES AS INVALID

CREATE PAGE LOCALITY IN CACHE CONTROLLER CACHE ALLOCATION

ADJUSTABLE OVER-RESTRICTIVE CACHE LOCKING LIMIT FOR IMPROVED OVERAL...

ADJUSTABLE OVER-RESTRICTIVE CACHE LOCKING LIMIT FOR IMPROVED OVERAL...

ADAPTIVE ADMISSION CONTROL FOR ON DIE INTERCONNECT