Suvam Nandi

Person

Bangalore, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Reduced area, reduced power flip-flop
- Patent number 11,509,294
- Issue date Nov 22, 2022
- Texas Instruments Incorporated
- Badarish Mohan Subbannavar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reduced area, reduced power flip-flop
- Patent number 11,043,937
- Issue date Jun 22, 2021
- Texas Instruments Incorporated
- Badarish Mohan Subbannavar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Internally truncated multiplier
- Patent number 11,029,919
- Issue date Jun 8, 2021
- Texas Instruments Incorporated
- Jawaharlal Tangudu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital down converter
- Patent number 10,666,293
- Issue date May 26, 2020
- Texas Instruments Incorporated
- Jawaharlal Tangudu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Internally truncated multiplier
- Patent number 10,635,396
- Issue date Apr 28, 2020
- Texas Instruments Incorporated
- Jawaharlal Tangudu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transformation based filter for interpolation or decimation
- Patent number 10,396,829
- Issue date Aug 27, 2019
- TEXAS INTSTUMENTS INCORPORATED
- Jaiganesh Balakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ultra-low power static state flip flop
- Patent number 10,382,020
- Issue date Aug 13, 2019
- Texas Instruments Incorporated
- Suvam Nandi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Internally truncated multiplier
- Patent number 10,372,415
- Issue date Aug 6, 2019
- Texas Instruments Incorporated
- Jawaharlal Tangudu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transformation based filter for interpolation or decimation
- Patent number 10,090,866
- Issue date Oct 2, 2018
- Texas Instruments Incorporated
- Jaiganesh Balakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ultra-low power static state flip flop
- Patent number 10,056,882
- Issue date Aug 21, 2018
- Texas Instruments Incorporated
- Suvam Nandi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital down converter
- Patent number 9,985,650
- Issue date May 29, 2018
- Texas Instruments Incorporated
- Jawaharlal Tangudu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low area full adder with shared transistors
- Patent number 9,471,278
- Issue date Oct 18, 2016
- Texas Instruments Incorporated
- Suvam Nandi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low area flip-flop with a shared inverter
- Patent number 9,425,771
- Issue date Aug 23, 2016
- Texas Instruments Incorporated
- Suvam Nandi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Flip-flops with low clock power
- Patent number 9,350,327
- Issue date May 24, 2016
- Texas Instruments Incorporated
- Suvam Nandi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated clock gating cell using a low area and a low power latch
- Patent number 9,246,489
- Issue date Jan 26, 2016
- Texas Instruments Incorporated
- Suvam Nandi
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
REDUCED AREA, REDUCED POWER FLIP-FLOP
- Publication number 20210265985
- Publication date Aug 26, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Badarish Mohan SUBBANNAVAR
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
REDUCED AREA, REDUCED POWER FLIP-FLOP
- Publication number 20210184659
- Publication date Jun 17, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Badarish Mohan SUBBANNAVAR
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
INTERNALLY TRUNCATED MULTIPLIER
- Publication number 20200301666
- Publication date Sep 24, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Jawaharlal TANGUDU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Ultra-Low Power Static State Flip Flop
- Publication number 20190319612
- Publication date Oct 17, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Suvam Nandi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
INTERNALLY TRUNCATED MULTIPLIER
- Publication number 20190317731
- Publication date Oct 17, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Jawaharlal TANGUDU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Transformation Based Filter for Interpolation or Decimation
- Publication number 20180367169
- Publication date Dec 20, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Jaiganesh Balakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Ultra-Low Power Static State Flip Flop
- Publication number 20180331675
- Publication date Nov 15, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Suvam Nandi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DIGITAL DOWN CONVERTER
- Publication number 20180241413
- Publication date Aug 23, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Jawaharlal TANGUDU
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TRANSFORMATION BASED FILTER FOR INTERPOLATION OR DECIMATION
- Publication number 20180191383
- Publication date Jul 5, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Jaiganesh Balakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERNALLY TRUNCATED MULTIPLIER
- Publication number 20170322773
- Publication date Nov 9, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Jawaharlal TANGUDU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIGITAL DOWN CONVERTER
- Publication number 20170324423
- Publication date Nov 9, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Jawaharlal TANGUDU
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ULTRA-LOW POWER STATIC STATE FLIP FLOP
- Publication number 20170194943
- Publication date Jul 6, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Suvam Nandi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOW AREA FULL ADDER WITH SHARED TRANSISTORS
- Publication number 20160092170
- Publication date Mar 31, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Suvam Nandi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLIP-FLOPS WITH LOW CLOCK POWER
- Publication number 20160094204
- Publication date Mar 31, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Suvam Nandi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOW AREA FLIP-FLOP WITH A SHARED INVERTER
- Publication number 20160094203
- Publication date Mar 31, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Suvam Nandi
- H03 - BASIC ELECTRONIC CIRCUITRY

Suvam Nandi

Person

Patents Grantslast 30 patents

Reduced area, reduced power flip-flop

Reduced area, reduced power flip-flop

Internally truncated multiplier

Digital down converter

Internally truncated multiplier

Transformation based filter for interpolation or decimation

Ultra-low power static state flip flop

Internally truncated multiplier

Transformation based filter for interpolation or decimation

Ultra-low power static state flip flop

Digital down converter

Low area full adder with shared transistors

Low area flip-flop with a shared inverter

Flip-flops with low clock power

Integrated clock gating cell using a low area and a low power latch

Patents Applicationslast 30 patents

REDUCED AREA, REDUCED POWER FLIP-FLOP

REDUCED AREA, REDUCED POWER FLIP-FLOP

INTERNALLY TRUNCATED MULTIPLIER

Ultra-Low Power Static State Flip Flop

INTERNALLY TRUNCATED MULTIPLIER

Transformation Based Filter for Interpolation or Decimation

Ultra-Low Power Static State Flip Flop

DIGITAL DOWN CONVERTER

TRANSFORMATION BASED FILTER FOR INTERPOLATION OR DECIMATION

INTERNALLY TRUNCATED MULTIPLIER

DIGITAL DOWN CONVERTER

ULTRA-LOW POWER STATIC STATE FLIP FLOP

LOW AREA FULL ADDER WITH SHARED TRANSISTORS

FLIP-FLOPS WITH LOW CLOCK POWER

LOW AREA FLIP-FLOP WITH A SHARED INVERTER