Suvansh K. Kapur

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Beaverton, OR, US

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Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for exploiting parallelism across multiple tra...
- Patent number 7,562,194
- Issue date Jul 14, 2009
- Intel Corporation
- Raman Nayyar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transaction flow and ordering for a packet processing engine, locat...
- Patent number 7,487,284
- Issue date Feb 3, 2009
- Intel Corporation
- Suvansh Krishan Kapur
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Shared bypass bus structure
- Patent number 6,912,612
- Issue date Jun 28, 2005
- Intel Corporation
- Suvansh K. Kapur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual mode bus bridge for computer system
- Patent number 6,134,622
- Issue date Oct 17, 2000
- Intel Corporation
- Suvansh Kapur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus protocol for atomic transactions
- Patent number 5,987,552
- Issue date Nov 16, 1999
- Intel Corporation
- Suresh Chittor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for providing remote memory access in a distri...
- Patent number 5,613,071
- Issue date Mar 18, 1997
- Intel Corporation
- Linda J. Rankin
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Method and Apparatus for Exploiting Parallelism Across Multiple Tra...
- Publication number 20090254714
- Publication date Oct 8, 2009
- Intel Corporation
- Raman Nayyar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Transaction flow and ordering for a packet processing engine, loca...
- Publication number 20080025289
- Publication date Jan 31, 2008
- Suvansh Krishan Kapur
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Shared bypass bus structure
- Publication number 20030163649
- Publication date Aug 28, 2003
- Suvansh K. Kapur
- G06 - COMPUTING CALCULATING COUNTING