Swapnajit Chakraborti

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Noida, IN

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Patents Grantslast 30 patents

Information Patent Grant
Systems for total coverage analysis and ranking of circuit designs
- Patent number 8,214,782
- Issue date Jul 3, 2012
- Cadence Design Systems, Inc.
- Swapnajit Chakraborti
- G01 - MEASURING TESTING
Information Patent Grant
Systems, methods, and apparatus for total coverage analysis and ran...
- Patent number 7,886,242
- Issue date Feb 8, 2011
- Cadence Design Systems, Inc.
- Swapnajit Chakraborti
- G01 - MEASURING TESTING
Information Patent Grant
Mechanism for recognizing and abstracting memory structures
- Patent number 7,031,898
- Issue date Apr 18, 2006
- Cadence Design Systems, Inc.
- Alok Jain
- G06 - COMPUTING CALCULATING COUNTING