Sylvain BARRAUD

Person

Le Grand Lemps, FR

People

Patents Grantslast 30 patents

Information Patent Grant
Device comprising wrap-gate transistors and method of manufacturing...
- Patent number 11,889,704
- Issue date Jan 30, 2024
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Sylvain Barraud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D memory and manufacturing process
- Patent number 11,532,670
- Issue date Dec 20, 2022
- Commissariat A'Lenergie Atomique et aux Energies Alternatives
- Sylvain Barraud
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for producing an electronic component with double quantum dots
- Patent number 11,398,593
- Issue date Jul 26, 2022
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Sylvain Barraud
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Method of fabricating a field effect transistor
- Patent number 11,239,374
- Issue date Feb 1, 2022
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Sylvain Barraud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Architecture of N and P transistors superposed with canal structure...
- Patent number 11,152,360
- Issue date Oct 19, 2021
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Sylvain Barraud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing an electronic component including multiple...
- Patent number 11,088,259
- Issue date Aug 10, 2021
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Louis Hutin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic component with multiple quantum islands
- Patent number 10,903,349
- Issue date Jan 26, 2021
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Louis Hutin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Quantum box device comprising dopants located in a thin semiconduct...
- Patent number 10,522,669
- Issue date Dec 31, 2019
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Sylvain Barraud
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Method for making a semiconductor device with nanowire and aligned...
- Patent number 10,217,849
- Issue date Feb 26, 2019
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Sylvain Barraud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Single-electron transistor and its fabrication method
- Patent number 9,911,841
- Issue date Mar 6, 2018
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Sylvain Barraud
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Method for making a transistor in a stack of superimposed semicondu...
- Patent number 9,876,121
- Issue date Jan 23, 2018
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Sylvain Barraud
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Method for fabricating a nanowire semiconductor transistor having a...
- Patent number 9,853,124
- Issue date Dec 26, 2017
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Sylvain Barraud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nanowire semiconductor device partially surrounded by a gate
- Patent number 9,728,405
- Issue date Aug 8, 2017
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Sylvain Barraud
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Nanowire and planar transistors co-integrated on utbox SOI substrate
- Patent number 9,425,255
- Issue date Aug 23, 2016
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Sylvain Barraud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nanowire and planar transistors co-integrated on utbox SOI substrate
- Patent number 9,276,073
- Issue date Mar 1, 2016
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Sylvain Barraud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for producing a transistor structure with superimposed nanow...
- Patent number 8,969,148
- Issue date Mar 3, 2015
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Maud Vinet
- B82 - NANO-TECHNOLOGY

Patents Applicationslast 30 patents

Information Patent Application
STACK OF MONOCRYSTALLINE LAYERS FOR PRODUCING MICROELECTRONIC DEVIC...
- Publication number 20240154036
- Publication date May 9, 2024
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Sylvain Barraud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC DEVICE WITH TWO FIELD-EFFECT TRANSISTORS HAVING A C...
- Publication number 20240038764
- Publication date Feb 1, 2024
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Sylvain BARRAUD
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC DEVICE WITH TWO FIELD-EFFECT TRANSISTORS
- Publication number 20240030221
- Publication date Jan 25, 2024
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Sylvain BARRAUD
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Three-dimensional structure of memories for in-memory computing
- Publication number 20230245698
- Publication date Aug 3, 2023
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Théophile DUBREUIL
- G11 - INFORMATION STORAGE
Information Patent Application
1T1R MEMORY WITH A 3D STRUCTURE
- Publication number 20220415967
- Publication date Dec 29, 2022
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Sylvain BARRAUD
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR MANUFACTURING A TRANSISTOR WITH A GATE-ALL-AROUND STRUCTURE
- Publication number 20220384573
- Publication date Dec 1, 2022
- COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES AL TERNATIVES
- Cyrille LE ROYER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ARCHITECTURE WITH STACKED N AND P TRANSISTORS WITH A CHANNEL STRUCT...
- Publication number 20210391326
- Publication date Dec 16, 2021
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Sylvain Barraud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE COMPRISING WRAP-GATE TRANSISTORS AND METHOD OF MANUFACTURING...
- Publication number 20210296398
- Publication date Sep 23, 2021
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Sylvain BARRAUD
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D MEMORY AND MANUFACTURING PROCESS
- Publication number 20210193738
- Publication date Jun 24, 2021
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Sylvain BARRAUD
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR PRODUCING AN ELECTRONIC COMPONENT WITH DOUBLE QUANTUM DOTS
- Publication number 20200343435
- Publication date Oct 29, 2020
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Sylvain BARRAUD
- B82 - NANO-TECHNOLOGY
Information Patent Application
ARCHITECTURE OF N AND P TRANSISTORS SUPERPOSED WITH CANAL STRUCTURE...
- Publication number 20200203341
- Publication date Jun 25, 2020
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Sylvain Barraud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FABRICATING A FIELD EFFECT TRANSISTOR
- Publication number 20200176613
- Publication date Jun 4, 2020
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Sylvain BARRAUD
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MANUFACTURING AN ELECTRONIC COMPONENT INCLUDING MULTIPLE...
- Publication number 20190371908
- Publication date Dec 5, 2019
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Louis HUTIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MANUFACTURING AN ELECTRONIC COMPONENT INCLUDING QUANTUM DOTS
- Publication number 20190371926
- Publication date Dec 5, 2019
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Louis HUTIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D CIRCUIT WITH N AND P JUNCTIONLESS TRANSISTORS
- Publication number 20190148367
- Publication date May 16, 2019
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Jean-Pierre Colinge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MAKING A SEMICONDUCTOR DEVICE WITH NANOWIRE AND ALIGNED...
- Publication number 20180175163
- Publication date Jun 21, 2018
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Sylvain BARRAUD
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
QUANTUM BOX DEVICE COMPRISING DOPANTS LOCATED IN A THIN SEMICONDUCT...
- Publication number 20180097095
- Publication date Apr 5, 2018
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Sylvain BARRAUD
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING A NANOWIRE SEMICONDUCTOR TRANSISTOR HAVING A...
- Publication number 20170141212
- Publication date May 18, 2017
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Sylvain BARRAUD
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MAKING A TRANSISTOR IN A STACK OF SUPERIMPOSED SEMICONDU...
- Publication number 20160276494
- Publication date Sep 22, 2016
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Sylvain BARRAUD
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SINGLE-ELECTRON TRANSISTOR AND ITS FABRICATION METHOD
- Publication number 20160268406
- Publication date Sep 15, 2016
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Sylvain BARRAUD
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NANOWIRE AND PLANAR TRANSISTORS CO-INTEGRATED ON UTBOX SOI SUBSTRATE
- Publication number 20160133700
- Publication date May 12, 2016
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Sylvain BARRAUD
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NANOWIRE SEMICONDUCTOR DEVICE PARTIALLY SURROUNDED BY A GRATING
- Publication number 20150194489
- Publication date Jul 9, 2015
- COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE. ALT.
- Sylvain BARRAUD
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PLANAR TRANSISTORS WITH NANOWIRES COINTEGRATED ON A SOI UTBOX SUBST...
- Publication number 20140326955
- Publication date Nov 6, 2014
- COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE. ALT.
- Sylvain BARRAUD
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PRODUCING A TRANSISTOR STRUCTURE WITH SUPERIMPOSED NANOW...
- Publication number 20130302955
- Publication date Nov 14, 2013
- COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE. ALT.
- MAUD VINET
- B82 - NANO-TECHNOLOGY

Sylvain BARRAUD

Person

Patents Grantslast 30 patents

Device comprising wrap-gate transistors and method of manufacturing...

3D memory and manufacturing process

Method for producing an electronic component with double quantum dots

Method of fabricating a field effect transistor

Architecture of N and P transistors superposed with canal structure...

Method of manufacturing an electronic component including multiple...

Electronic component with multiple quantum islands

Quantum box device comprising dopants located in a thin semiconduct...

Method for making a semiconductor device with nanowire and aligned...

Single-electron transistor and its fabrication method

Method for making a transistor in a stack of superimposed semicondu...

Method for fabricating a nanowire semiconductor transistor having a...

Nanowire semiconductor device partially surrounded by a gate

Nanowire and planar transistors co-integrated on utbox SOI substrate

Nanowire and planar transistors co-integrated on utbox SOI substrate

Method for producing a transistor structure with superimposed nanow...

Patents Applicationslast 30 patents

STACK OF MONOCRYSTALLINE LAYERS FOR PRODUCING MICROELECTRONIC DEVIC...

MICROELECTRONIC DEVICE WITH TWO FIELD-EFFECT TRANSISTORS HAVING A C...

MICROELECTRONIC DEVICE WITH TWO FIELD-EFFECT TRANSISTORS

Three-dimensional structure of memories for in-memory computing

1T1R MEMORY WITH A 3D STRUCTURE

METHOD FOR MANUFACTURING A TRANSISTOR WITH A GATE-ALL-AROUND STRUCTURE

ARCHITECTURE WITH STACKED N AND P TRANSISTORS WITH A CHANNEL STRUCT...

DEVICE COMPRISING WRAP-GATE TRANSISTORS AND METHOD OF MANUFACTURING...

3D MEMORY AND MANUFACTURING PROCESS

METHOD FOR PRODUCING AN ELECTRONIC COMPONENT WITH DOUBLE QUANTUM DOTS

ARCHITECTURE OF N AND P TRANSISTORS SUPERPOSED WITH CANAL STRUCTURE...

METHOD OF FABRICATING A FIELD EFFECT TRANSISTOR

METHOD OF MANUFACTURING AN ELECTRONIC COMPONENT INCLUDING MULTIPLE...

METHOD OF MANUFACTURING AN ELECTRONIC COMPONENT INCLUDING QUANTUM DOTS

3D CIRCUIT WITH N AND P JUNCTIONLESS TRANSISTORS

METHOD FOR MAKING A SEMICONDUCTOR DEVICE WITH NANOWIRE AND ALIGNED...

QUANTUM BOX DEVICE COMPRISING DOPANTS LOCATED IN A THIN SEMICONDUCT...

METHOD FOR FABRICATING A NANOWIRE SEMICONDUCTOR TRANSISTOR HAVING A...

METHOD FOR MAKING A TRANSISTOR IN A STACK OF SUPERIMPOSED SEMICONDU...

SINGLE-ELECTRON TRANSISTOR AND ITS FABRICATION METHOD

NANOWIRE AND PLANAR TRANSISTORS CO-INTEGRATED ON UTBOX SOI SUBSTRATE

NANOWIRE SEMICONDUCTOR DEVICE PARTIALLY SURROUNDED BY A GRATING

PLANAR TRANSISTORS WITH NANOWIRES COINTEGRATED ON A SOI UTBOX SUBST...

METHOD FOR PRODUCING A TRANSISTOR STRUCTURE WITH SUPERIMPOSED NANOW...