Sz-Fan Chen

Person

Hsinchu, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Method for reducing charging of semiconductor wafers
- Patent number 12,165,867
- Issue date Dec 10, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Wei-Lin Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Photolithography alignment process for bonded wafers
- Patent number 11,916,022
- Issue date Feb 27, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yeong-Jyh Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for reducing charging of semiconductor wafers
- Patent number 11,769,662
- Issue date Sep 26, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Wei-Lin Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Improving surface topography by forming spacer-like components
- Patent number 11,665,897
- Issue date May 30, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chun-Chang Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Photolithography alignment process for bonded wafers
- Patent number 11,362,038
- Issue date Jun 14, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yeong-Jyh Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Surface topography by forming spacer-like components
- Patent number 11,276,699
- Issue date Mar 15, 2022
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chun-Chang Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Surface topography by forming spacer-like components
- Patent number 10,522,557
- Issue date Dec 31, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chun-Chang Wu
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
PHOTOLITHOGRAPHY ALIGNMENT PROCESS FOR BONDED WAFERS
- Publication number 20240186258
- Publication date Jun 6, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yeong-Jyh Lin
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
MULTI-BIT LEVEL SHIFTER WITH SHARED ENABLE SIGNALS
- Publication number 20230223937
- Publication date Jul 13, 2023
- MEDIATEK INC.
- Sz-Han CHEN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PHOTOLITHOGRAPHY ALIGNMENT PROCESS FOR BONDED WAFERS
- Publication number 20220328419
- Publication date Oct 13, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yeong-Jyh Lin
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
METHOD FOR REDUCING CHARGING OF SEMICONDUCTOR WAFERS
- Publication number 20220301849
- Publication date Sep 22, 2022
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Wei-Lin CHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Improving Surface Topography by Forming Spacer-Like Components
- Publication number 20220199636
- Publication date Jun 23, 2022
- Taiwan Semiconductor Manufacturing Co., LTD
- Chun-Chang Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PHOTOLITHOGRAPHY ALIGNMENT PROCESS FOR BONDED WAFERS
- Publication number 20210375781
- Publication date Dec 2, 2021
- Taiwan Semiconductor Manufacturing Co., LTD
- Yeong-Jyh Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Surface Topography by Forming Spacer-Like Components
- Publication number 20200127000
- Publication date Apr 23, 2020
- Taiwan Semiconductor Manufacturing Co., LTD
- Chun-Chang Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SURFACE TOPOGRAPHY BY FORMING SPACER-LIKE COMPONENTS
- Publication number 20190131313
- Publication date May 2, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chun-Chang Wu
- H01 - BASIC ELECTRIC ELEMENTS

Sz-Fan Chen

Person

Patents Grantslast 30 patents

Method for reducing charging of semiconductor wafers

Photolithography alignment process for bonded wafers

Method for reducing charging of semiconductor wafers

Improving surface topography by forming spacer-like components

Photolithography alignment process for bonded wafers

Surface topography by forming spacer-like components

Surface topography by forming spacer-like components

Patents Applicationslast 30 patents

PHOTOLITHOGRAPHY ALIGNMENT PROCESS FOR BONDED WAFERS

MULTI-BIT LEVEL SHIFTER WITH SHARED ENABLE SIGNALS

PHOTOLITHOGRAPHY ALIGNMENT PROCESS FOR BONDED WAFERS

METHOD FOR REDUCING CHARGING OF SEMICONDUCTOR WAFERS

Improving Surface Topography by Forming Spacer-Like Components

PHOTOLITHOGRAPHY ALIGNMENT PROCESS FOR BONDED WAFERS

Surface Topography by Forming Spacer-Like Components

SURFACE TOPOGRAPHY BY FORMING SPACER-LIKE COMPONENTS