Sze-Hon Kwan

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Field effect Trench transistor having lightly doped epitaxial regio...
- Patent number 5,910,669
- Issue date Jun 8, 1999
- Siliconix Incorporated
- Mike F. Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned method of fabricating terrace gate DMOS transistor
- Patent number 5,879,994
- Issue date Mar 9, 1999
- National Semiconductor Corporation
- Sze-Hon Kwan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a self-aligned contact trench DMOS transistor...
- Patent number 5,665,619
- Issue date Sep 9, 1997
- National Semiconductor Corporation
- Sze-Hon Kwan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating self-aligned contact trench DMOS transistors
- Patent number 5,567,634
- Issue date Oct 22, 1996
- National Semiconductor Corporation
- Francois Hebert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making a field effect trench transistor having lightly do...
- Patent number 5,532,179
- Issue date Jul 2, 1996
- Siliconix Incorporated
- Mike F. Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Trenched DMOS transistor with channel block at cell trench corners
- Patent number 5,468,982
- Issue date Nov 21, 1995
- Siliconix Incorporated
- Fwu-Iuan Hshieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Trenched DMOS transistor fabrication using six masks
- Patent number 5,316,959
- Issue date May 31, 1994
- Siliconix, Incorporated
- Sze-Hon Kwan
- H01 - BASIC ELECTRIC ELEMENTS

Sze-Hon Kwan

Person

Patents Grantslast 30 patents

Field effect Trench transistor having lightly doped epitaxial regio...

Self-aligned method of fabricating terrace gate DMOS transistor

Method of fabricating a self-aligned contact trench DMOS transistor...

Method of fabricating self-aligned contact trench DMOS transistors

Method of making a field effect trench transistor having lightly do...

Trenched DMOS transistor with channel block at cell trench corners

Trenched DMOS transistor fabrication using six masks