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Tadashi Yabuta
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Tokyo, JP
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Patents Grants
last 30 patents
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Patent Grant
Semiconductor memory device having both redundancy and test capabil...
Patent number
5,801,986
Issue date
Sep 1, 1998
Kabushiki Kaisha Toshiba
Osamu Matsumoto
G11 - INFORMATION STORAGE
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Patent Grant
Central processing unit and an arithmetic operation processing unit
Patent number
5,677,859
Issue date
Oct 14, 1997
Kabushiki Kaisha Toshiba
Kenjiro Kanayama
G06 - COMPUTING CALCULATING COUNTING
Patents Applications
last 30 patents
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Patent Application
Built-in self test systems and methods for multiple memories
Publication number
20050289423
Publication date
Dec 29, 2005
Kabushiki Kaisha Toshiba
Tadashi Yabuta
G01 - MEASURING TESTING