Taihei Shido

Person

Tokyo, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Memory device with write data bus control
- Patent number 10,943,625
- Issue date Mar 9, 2021
- Micron Technology, Inc.
- Chikara Kondo
- G11 - INFORMATION STORAGE
Information Patent Grant
Shared error detection and correction memory
- Patent number 10,854,310
- Issue date Dec 1, 2020
- Micron Technology, Inc.
- Chiaki Dono
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with write data bus control
- Patent number 10,553,263
- Issue date Feb 4, 2020
- Micron Technology, Inc.
- Chikara Kondo
- G11 - INFORMATION STORAGE
Information Patent Grant
Shared error detection and correction memory
- Patent number 10,468,114
- Issue date Nov 5, 2019
- Micron Technology, Inc.
- Chiaki Dono
- G11 - INFORMATION STORAGE
Information Patent Grant
Stack access control for memory device
- Patent number 10,424,354
- Issue date Sep 24, 2019
- Micron Technology, Inc.
- Taihei Shido
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for fixing a logic level of an internal sig...
- Patent number 10,338,997
- Issue date Jul 2, 2019
- Micron Technology, Inc.
- Chiaki Dono
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Stack access control for memory device
- Patent number 10,304,505
- Issue date May 28, 2019
- Micron Technology, Inc.
- Taihei Shido
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus having dice to perform refresh operations
- Patent number 10,255,963
- Issue date Apr 9, 2019
- Micron Technology, Inc.
- Taihei Shido
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for write data bus control in a stacked memory de...
- Patent number 10,163,469
- Issue date Dec 25, 2018
- Micron Technology, Inc.
- Chikara Kondo
- G11 - INFORMATION STORAGE
Information Patent Grant
Stack access control for memory device
- Patent number 10,079,049
- Issue date Sep 18, 2018
- Micron Technology, Inc.
- Taihei Shido
- G11 - INFORMATION STORAGE
Information Patent Grant
Shared error detection and correction memory
- Patent number 10,008,287
- Issue date Jun 26, 2018
- Micron Technology, Inc.
- Chiaki Dono
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus having dice to perorm refresh operations
- Patent number 10,008,254
- Issue date Jun 26, 2018
- Micron Technology, Inc.
- Taihei Shido
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for fixing a logic level of an internal sig...
- Patent number 9,983,925
- Issue date May 29, 2018
- Micron Technology, Inc.
- Chiaki Dono
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus having dice to perorm refresh operations
- Patent number 9,570,142
- Issue date Feb 14, 2017
- Micron Technology, Inc.
- Taihei Shido
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device
- Patent number 9,564,206
- Issue date Feb 7, 2017
- Longitude Semiconductor S.a.r.l.
- Taihei Shido
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device having latency counter to control output timin...
- Patent number 8,867,301
- Issue date Oct 21, 2014
- PS4 Luxco S.A.R.L.
- Taihei Shido
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device performing burst order control and data bus in...
- Patent number 8,862,811
- Issue date Oct 14, 2014
- PS4 Luxco S.A.R.L.
- Taihei Shido
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY DEVICE WITH WRITE DATA BUS CONTROL
- Publication number 20200126603
- Publication date Apr 23, 2020
- Micron Technology, Inc.
- Chikara Kondo
- G11 - INFORMATION STORAGE
Information Patent Application
SHARED ERROR DETECTION AND CORRECTION MEMORY
- Publication number 20190295679
- Publication date Sep 26, 2019
- Micron Technology, Inc.
- Chiaki Dono
- G11 - INFORMATION STORAGE
Information Patent Application
STACK ACCESS CONTROL FOR MEMORY DEVICE
- Publication number 20190237116
- Publication date Aug 1, 2019
- Micron Technology, Inc.
- Taihei Shido
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE WITH WRITE DATA BUS CONTROL
- Publication number 20190122708
- Publication date Apr 25, 2019
- Micron Technology, Inc.
- Chikara Kondo
- G11 - INFORMATION STORAGE
Information Patent Application
STACK ACCESS CONTROL FOR MEMORY DEVICE
- Publication number 20190035442
- Publication date Jan 31, 2019
- Micron Technology, Inc.
- Taihei Shido
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHARED ERROR DETECTION AND CORRECTION MEMORY
- Publication number 20180301202
- Publication date Oct 18, 2018
- Micron Technology, Inc.
- Chiaki Dono
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR FIXING A LOGIC LEVEL OF AN INTERNAL SIG...
- Publication number 20180293128
- Publication date Oct 11, 2018
- Micron Technology, Inc.
- CHIAKI DONO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS HAVING DICE TO PERORM REFRESH OPERATIONS
- Publication number 20180261273
- Publication date Sep 13, 2018
- Micron Technology, Inc.
- Taihei Shido
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH WRITE DATA BUS CONTROL
- Publication number 20180151207
- Publication date May 31, 2018
- Micron Technology, Inc.
- Chikara Kondo
- G11 - INFORMATION STORAGE
Information Patent Application
SHARED ERROR DETECTION AND CORRECTION MEMORY
- Publication number 20180025789
- Publication date Jan 25, 2018
- Micron Technology, Inc.
- Chiaki Dono
- G11 - INFORMATION STORAGE
Information Patent Application
STACK ACCESS CONTROL FOR MEMORY DEVICE
- Publication number 20170358336
- Publication date Dec 14, 2017
- Micron Technology, Inc.
- Taihei Shido
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS HAVING DICE TO PERORM REFRESH OPERATIONS
- Publication number 20170154663
- Publication date Jun 1, 2017
- Micron Technology, Inc.
- Taihei Shido
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS HAVING DICE TO PERORM REFRESH OPERATIONS
- Publication number 20160343423
- Publication date Nov 24, 2016
- Micron Technology, Inc.
- Taihei Shido
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20160118105
- Publication date Apr 28, 2016
- PS4 LUXCO S.A.R.L.
- Taihei Shido
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR FIXING A LOGIC LEVEL OF AN INTERNAL SIG...
- Publication number 20160034340
- Publication date Feb 4, 2016
- Micron Technology, Inc.
- CHIAKI DONO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE HAVING LATENCY COUNTER TO CONTROL OUTPUT TIMIN...
- Publication number 20130094321
- Publication date Apr 18, 2013
- Elpida Memory, Inc.
- Taihei SHIDO
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE PERFORMING BURST ORDER CONTROL AND DATA BUS IN...
- Publication number 20130091327
- Publication date Apr 11, 2013
- Elpida Memory, Inc.
- Taihei SHIDO
- G06 - COMPUTING CALCULATING COUNTING

Taihei Shido

Person

Patents Grantslast 30 patents

Memory device with write data bus control

Shared error detection and correction memory

Memory device with write data bus control

Shared error detection and correction memory

Stack access control for memory device

Apparatuses and methods for fixing a logic level of an internal sig...

Stack access control for memory device

Apparatus having dice to perform refresh operations

System and method for write data bus control in a stacked memory de...

Stack access control for memory device

Shared error detection and correction memory

Apparatus having dice to perorm refresh operations

Apparatuses and methods for fixing a logic level of an internal sig...

Apparatus having dice to perorm refresh operations

Semiconductor device

Semiconductor device having latency counter to control output timin...

Semiconductor device performing burst order control and data bus in...

Patents Applicationslast 30 patents

MEMORY DEVICE WITH WRITE DATA BUS CONTROL

SHARED ERROR DETECTION AND CORRECTION MEMORY

STACK ACCESS CONTROL FOR MEMORY DEVICE

MEMORY DEVICE WITH WRITE DATA BUS CONTROL

STACK ACCESS CONTROL FOR MEMORY DEVICE

SHARED ERROR DETECTION AND CORRECTION MEMORY

APPARATUSES AND METHODS FOR FIXING A LOGIC LEVEL OF AN INTERNAL SIG...

APPARATUS HAVING DICE TO PERORM REFRESH OPERATIONS

MEMORY DEVICE WITH WRITE DATA BUS CONTROL

SHARED ERROR DETECTION AND CORRECTION MEMORY

STACK ACCESS CONTROL FOR MEMORY DEVICE

APPARATUS HAVING DICE TO PERORM REFRESH OPERATIONS

APPARATUS HAVING DICE TO PERORM REFRESH OPERATIONS

SEMICONDUCTOR DEVICE

APPARATUSES AND METHODS FOR FIXING A LOGIC LEVEL OF AN INTERNAL SIG...

SEMICONDUCTOR DEVICE HAVING LATENCY COUNTER TO CONTROL OUTPUT TIMIN...

SEMICONDUCTOR DEVICE PERFORMING BURST ORDER CONTROL AND DATA BUS IN...