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Tak M. Mak
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Union City, CA, US
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Patents Grants
last 30 patents
Information
Patent Grant
Coupling inductors in an IC device using interconnecting elements w...
Patent number
11,557,420
Issue date
Jan 17, 2023
GLOBALFOUNDRIES Inc.
Tak Ming Mak
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Systems and methods for dynamically reconfiguring automatic test eq...
Patent number
10,673,723
Issue date
Jun 2, 2020
A.T.E. SOLUTIONS, INC.
Louis Yehuda Ungar
G01 - MEASURING TESTING
Information
Patent Grant
Method of fabricating integrated circuit (IC) devices
Patent number
9,646,758
Issue date
May 9, 2017
GLOBALFOUNDRIES Inc.
Tak Ming Mak
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Current tests for I/O interface connectors
Patent number
9,551,741
Issue date
Jan 24, 2017
Intel Corporation
Bharani Thiruvengadam
G01 - MEASURING TESTING
Information
Patent Grant
Input/output delay testing for devices utilizing on-chip delay gene...
Patent number
9,110,134
Issue date
Aug 18, 2015
Intel Corporation
Tak M. Mak
G01 - MEASURING TESTING
Information
Patent Grant
Method and apparatus for an optical interconnect system
Patent number
8,926,196
Issue date
Jan 6, 2015
Intel Corporation
Abram M. Detofsky
G02 - OPTICS
Information
Patent Grant
Method, system and apparatus for evaluation of input/output buffer...
Patent number
8,843,794
Issue date
Sep 23, 2014
Intel Corporation
Christopher J. Nelson
G11 - INFORMATION STORAGE
Information
Patent Grant
System pulse latch and shadow pulse latch coupled to output joining...
Patent number
7,373,572
Issue date
May 13, 2008
Intel Corporation
Tak M. Mak
G01 - MEASURING TESTING
Information
Patent Grant
System and shadow circuits with output joining circuit
Patent number
7,278,074
Issue date
Oct 2, 2007
Intel Corporation
Subhasish Mitra
G01 - MEASURING TESTING
Information
Patent Grant
System and scanout circuits with error resilience circuit
Patent number
7,278,076
Issue date
Oct 2, 2007
Intel Corporation
Ming Zhang
G11 - INFORMATION STORAGE
Information
Patent Grant
Error detecting circuit
Patent number
7,188,284
Issue date
Mar 6, 2007
Intel Corporation
Subhasish Mitra
G11 - INFORMATION STORAGE
Information
Patent Grant
Pseudo bus agent to support functional testing
Patent number
7,185,247
Issue date
Feb 27, 2007
Intel Corporation
Tak M. Mak
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Functional testing of logic circuits that use high-speed links
Patent number
6,975,954
Issue date
Dec 13, 2005
Intel Corporation
Tak M. Mak
G01 - MEASURING TESTING
Information
Patent Grant
Device testing
Patent number
6,885,209
Issue date
Apr 26, 2005
Intel Corporation
Tak M. Mak
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
Memory cell structural test
Patent number
6,757,209
Issue date
Jun 29, 2004
Intel Corporation
Tak M. Mak
G11 - INFORMATION STORAGE
Information
Patent Grant
Memory addressing structural test
Patent number
6,721,216
Issue date
Apr 13, 2004
Intel Corporation
Tak M. Mak
G11 - INFORMATION STORAGE
Information
Patent Grant
Method and apparatus to structurally detect random defects that imp...
Patent number
6,629,274
Issue date
Sep 30, 2003
Intel Corporation
Mike Tripp
G11 - INFORMATION STORAGE
Information
Patent Grant
Bus signature analyzer and behavioral functional test method
Patent number
6,424,926
Issue date
Jul 23, 2002
Intel Corporation
Tak M. Mak
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Flip-chip having an on-chip decoupling capacitor
Patent number
6,222,246
Issue date
Apr 24, 2001
Intel Corporation
Tak M. Mak
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Method and apparatus for buffer self-test and characterization
Patent number
5,621,739
Issue date
Apr 15, 1997
Intel Corporation
Christopher J. Sine
G01 - MEASURING TESTING
Patents Applications
last 30 patents
Information
Patent Application
SYSTEMS AND METHODS FOR JITTER INJECTION WITH PRE- AND POST- EMPHAS...
Publication number
20230099768
Publication date
Mar 30, 2023
A.T.E. Solutions, Inc.
Louis Yehuda UNGAR
G01 - MEASURING TESTING
Information
Patent Application
SYSTEM AND METHODS FOR DYNAMICALLY RECONFIGURING AUTOMATIC TEST EQU...
Publication number
20200259730
Publication date
Aug 13, 2020
A.T.E. Solutions, Inc.
Louis Yehuda Ungar
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
SYSTEMS AND METHODS FOR DYNAMICALLY RECONFIGURING AUTOMATIC TEST EQ...
Publication number
20180205621
Publication date
Jul 19, 2018
A.T.E. Solutions, Inc.
Louis Yehuda Ungar
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
COUPLING INDUCTORS IN AN IC DEVICE USING INTERCONNECTING ELEMENTS W...
Publication number
20170154722
Publication date
Jun 1, 2017
GLOBALFOUNDRIES INC.
Tak Ming MAK
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
COUPLING INDUCTORS IN AN IC DEVICE USING INTERCONNECTING ELEMENTS W...
Publication number
20170018348
Publication date
Jan 19, 2017
GLOBALFOUNDRIES INC.
Tak Ming MAK
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
TOP-SIDE INTERCONNECTION SUBSTRATE FOR DIE-TO-DIE INTERCONNECTION
Publication number
20160111406
Publication date
Apr 21, 2016
GLOBALFOUNDRIES INC.
Tak Ming Mak
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
INTEGRATED CIRCUIT DEVICE HAVING SUPPORTS FOR USE IN A MULTI-DIMENS...
Publication number
20150228635
Publication date
Aug 13, 2015
GLOBALFOUNDRIES INC.
Tak M. Mak
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
INPUT/OUTPUT DELAY TESTING FOR DEVICES UTILIZING ON-CHIP DELAY GENE...
Publication number
20140189457
Publication date
Jul 3, 2014
Tak M. Mak
G01 - MEASURING TESTING
Information
Patent Application
METHOD AND APPARATUS FOR AN OPTICAL INTERCONNECT SYSTEM
Publication number
20140093214
Publication date
Apr 3, 2014
Abram M. DETOFSKY
G02 - OPTICS
Information
Patent Application
METHOD, SYSTEM AND APPARATUS FOR EVALUATION OF INPUT/OUTPUT BUFFER...
Publication number
20140089752
Publication date
Mar 27, 2014
Christopher J. Nelson
G01 - MEASURING TESTING
Information
Patent Application
CURRENT TESTS FOR I/O INTERFACE CONNECTORS
Publication number
20130271167
Publication date
Oct 17, 2013
Bharani Thiruvengadam
G01 - MEASURING TESTING
Information
Patent Application
System and shadow circuits with output joining circuit
Publication number
20060168489
Publication date
Jul 27, 2006
Intel Corporation
Subhasish Mitra
G01 - MEASURING TESTING
Information
Patent Application
System pulse latch and shadow pulse latch coupled to output joining...
Publication number
20060168487
Publication date
Jul 27, 2006
Intel Corporation
Tak M. Mak
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Application
Testing integrated circuits using high bandwidth wireless technology
Publication number
20060052075
Publication date
Mar 9, 2006
Rajeshwar Galivanche
G01 - MEASURING TESTING
Information
Patent Application
Error detecting circuit
Publication number
20060005091
Publication date
Jan 5, 2006
Subhasish Mitra
G01 - MEASURING TESTING
Information
Patent Application
System and scanout circuits with error resilience circuit
Publication number
20060005103
Publication date
Jan 5, 2006
Intel Corporation
Ming Zhang
G01 - MEASURING TESTING
Information
Patent Application
Functional testing of logic circuits that use high-speed links
Publication number
20040267484
Publication date
Dec 30, 2004
Tak M. Mak
G01 - MEASURING TESTING
Information
Patent Application
Pseudo bus agent to support functional testing
Publication number
20040268200
Publication date
Dec 30, 2004
Intel Corporation
Tak M. Mak
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Device testing
Publication number
20040036494
Publication date
Feb 26, 2004
Tak M. Mak
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Application
Memory addressing structural test
Publication number
20020141276
Publication date
Oct 3, 2002
Tak M. Mak
G11 - INFORMATION STORAGE
Information
Patent Application
Memory cell structural test
Publication number
20020141259
Publication date
Oct 3, 2002
Tak M. Mak
G11 - INFORMATION STORAGE