Takashi Ishioka

Person

Tokyo, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Noise suppression circuit, ASIC, navigation apparatus, communicatio...
- Patent number 7,230,554
- Issue date Jun 12, 2007
- Kabushiki Kaisha Toshiba
- Hideki Takeuchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for distributing clock signals to flip-flop circuits
- Patent number 7,075,336
- Issue date Jul 11, 2006
- Kabushiki Kaisha Toshiba
- Naohito Kojima
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Noise suppression circuit, ASIC, navigation apparatus, communicatio...
- Patent number 7,064,691
- Issue date Jun 20, 2006
- Kabushiki Kaisha Toshiba
- Hideki Takeuchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method of automatic layout design for LSI, mask set and semiconduct...
- Patent number 6,813,756
- Issue date Nov 2, 2004
- Kabushiki Kaisha Toshiba
- Mutsunori Igarashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of automatic layout design for LSI, mask set and semiconduct...
- Patent number 6,546,540
- Issue date Apr 8, 2003
- Kabushiki Kaisha Toshiba
- Mutsunori Igarashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Noise suppression circuit, ASIC, navigation apparatus communication...
- Patent number 6,459,331
- Issue date Oct 1, 2002
- Kabushiki Kaisha Toshiba
- Hideki Takeuchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor device manufacturing method by carrying out logic design
- Patent number 5,913,101
- Issue date Jun 15, 1999
- Kabushiki Kaisha Toshiba
- Masako Murofushi
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CLOCK TREE DESIGNING APPARATUS AND CLOCK TREE DESIGNING METHOD
- Publication number 20120240090
- Publication date Sep 20, 2012
- Kabushiki Kaisha Toshiba
- Toshiaki SHIRAI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR INTEGRATED CIRCUIT, METHOD FOR DESIGNING SEMICONDUCTO...
- Publication number 20110260764
- Publication date Oct 27, 2011
- Kabushiki Kaisha Toshiba
- Takeshi KITAHARA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Noise suppression circuit, ASIC, navigation apparatus, communicatio...
- Publication number 20060197695
- Publication date Sep 7, 2006
- Kabushiki Kaisha Toshiba
- Hideki Takeuchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method of automatic layout design for LSI, mask set and semiconduct...
- Publication number 20030079194
- Publication date Apr 24, 2003
- Mutsunori Igarashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Noise suppression circuit, asic, navigation apparatus, communicatio...
- Publication number 20030011500
- Publication date Jan 16, 2003
- Kabushiki Kaisha Toshiba
- Hideki Takeuchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method for distributing clock signals to flip-flop circuits
- Publication number 20030014724
- Publication date Jan 16, 2003
- Naohito Kojima
- G06 - COMPUTING CALCULATING COUNTING

Takashi Ishioka

Person

Patents Grantslast 30 patents

Noise suppression circuit, ASIC, navigation apparatus, communicatio...

Method for distributing clock signals to flip-flop circuits

Noise suppression circuit, ASIC, navigation apparatus, communicatio...

Method of automatic layout design for LSI, mask set and semiconduct...

Method of automatic layout design for LSI, mask set and semiconduct...

Noise suppression circuit, ASIC, navigation apparatus communication...

Semiconductor device manufacturing method by carrying out logic design

Patents Applicationslast 30 patents

CLOCK TREE DESIGNING APPARATUS AND CLOCK TREE DESIGNING METHOD

SEMICONDUCTOR INTEGRATED CIRCUIT, METHOD FOR DESIGNING SEMICONDUCTO...

Noise suppression circuit, ASIC, navigation apparatus, communicatio...

Method of automatic layout design for LSI, mask set and semiconduct...

Noise suppression circuit, asic, navigation apparatus, communicatio...

Method for distributing clock signals to flip-flop circuits