Takashi Yoneda

Person

Kasugai-shi, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for extracting characteristic of semiconductor...
- Patent number 7,835,888
- Issue date Nov 16, 2010
- Fujitsu Semiconductor Limited
- Yoshio Inoue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Layout analysis method and apparatus for semiconductor integrated c...
- Patent number 7,802,218
- Issue date Sep 21, 2010
- Fujitsu Semiconductor Limited
- Yoshio Inoue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
LSI design method
- Patent number 7,257,789
- Issue date Aug 14, 2007
- Fujitsu Limited
- Toshikatsu Hosono
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor integrated circuit timing analysis apparatus timing a...
- Patent number 7,219,320
- Issue date May 15, 2007
- Fujitsu Limited
- Tetsuo Kawano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of designing wiring for power sources in a semiconductor chi...
- Patent number 6,604,229
- Issue date Aug 5, 2003
- Fujitsu Limited
- Kenji Suzuki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of designing semiconductor integrated circuit device, and ap...
- Patent number 6,550,050
- Issue date Apr 15, 2003
- Fujitsu Limited
- Toshikatsu Hosono
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for designing semiconductor device
- Patent number 6,496,964
- Issue date Dec 17, 2002
- Fujitsu Limited
- Masuo Inui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for calculating delay times in semiconductor c...
- Patent number 6,389,381
- Issue date May 14, 2002
- Fujitsu Limited
- Masahito Isoda
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Layout analysis method and apparatus for semiconductor integrated c...
- Publication number 20070106967
- Publication date May 10, 2007
- FUJITSU LIMITED
- Yoshio Inoue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for extracting characteristic of semiconductor...
- Publication number 20070106966
- Publication date May 10, 2007
- FUJITSU LIMITED
- Yoshio Inoue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LSI design method
- Publication number 20050278672
- Publication date Dec 15, 2005
- FUJITSU LIMITED
- Toshikatsu Hosono
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Timing analysis apparatus, timing analysis method and program product
- Publication number 20050081171
- Publication date Apr 14, 2005
- FUJITSU LIMITED
- Tetsuo Kawano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Wiring design method of integrated circuit device, system thereof,...
- Publication number 20030227032
- Publication date Dec 11, 2003
- FUJITSU LIMITED
- Takanori Nawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of designing semiconductor integrated circuit device, and ap...
- Publication number 20020049957
- Publication date Apr 25, 2002
- Toshikatsu Hosono
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of designing wiring for power sources in a semiconductor chi...
- Publication number 20020032897
- Publication date Mar 14, 2002
- Kenji Suzuki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for designing semiconductor device
- Publication number 20020002700
- Publication date Jan 3, 2002
- Masuo Inui
- G06 - COMPUTING CALCULATING COUNTING

Takashi Yoneda

Person

Patents Grantslast 30 patents

Method and apparatus for extracting characteristic of semiconductor...

Layout analysis method and apparatus for semiconductor integrated c...

LSI design method

Semiconductor integrated circuit timing analysis apparatus timing a...

Method of designing wiring for power sources in a semiconductor chi...

Method of designing semiconductor integrated circuit device, and ap...

Method for designing semiconductor device

Method and apparatus for calculating delay times in semiconductor c...

Patents Applicationslast 30 patents

Layout analysis method and apparatus for semiconductor integrated c...

Method and apparatus for extracting characteristic of semiconductor...

LSI design method

Timing analysis apparatus, timing analysis method and program product

Wiring design method of integrated circuit device, system thereof,...

Method of designing semiconductor integrated circuit device, and ap...

Method of designing wiring for power sources in a semiconductor chi...

Method for designing semiconductor device