Takeo Nakabayashi

Person

Hyogo, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Switch and switching method
- Patent number 6,301,259
- Issue date Oct 9, 2001
- Mitsubishi Denki Kabushiki Kaisha
- Takeo Nakabayashi
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
ATM protocol processing method and ATM protocol processing apparatus
- Patent number 5,822,322
- Issue date Oct 13, 1998
- Mitsubishi Denki Kabushiki Kaisha
- Takeo Nakabayashi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Interface board and instruction processing device without a local CPU
- Patent number 5,748,909
- Issue date May 5, 1998
- Mitsubishi Denki Kabushiki Kaisha
- Takeo Nakabayashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Protocol processor in communication network transferring data in as...
- Patent number 5,619,499
- Issue date Apr 8, 1997
- Mitsubishi Denki Kabushiki Kaisha
- Takeo Nakabayashi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Semiconductor integrated circuit for developing a system using a mi...
- Patent number 5,572,665
- Issue date Nov 5, 1996
- Mitsubishi Denki Kabushiki Kaisha
- Takeo Nakabayashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
I/O device interface having buffer mapped in processor memory addre...
- Patent number 5,444,852
- Issue date Aug 22, 1995
- Mitsubishi Denki Kabushiki Kaisha
- Takeo Nakabayashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor integrated circuit for central processor interfacing...
- Patent number 5,379,395
- Issue date Jan 3, 1995
- Mitsubishi Denki Kabushiki Kaisha
- Takeo Nakabayashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor integrated circuit operating in synchronism with a re...
- Patent number 5,227,682
- Issue date Jul 13, 1993
- Mitsubishi Denki Kabushiki Kaisha
- Takeo Nakabayashi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Data length detection device for detecting length of frame data def...
- Patent number 5,199,051
- Issue date Mar 30, 1993
- Mitsubishi Denki Kabushiki Kaisha
- Takeo Nakabayashi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Signal generator for generating pulse signals having particular wav...
- Patent number 5,093,845
- Issue date Mar 3, 1992
- Mitsubishi Denki Kabushiki Kaisha
- Harufusa Kondoh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Error check code generating device and transmission error detecting...
- Patent number 5,062,111
- Issue date Oct 29, 1991
- Mitsubishi Denki Kabushiki Kaisha
- Kouji Gotou
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Bus circuit and operating method thereof
- Patent number 5,053,642
- Issue date Oct 1, 1991
- Mitsubishi Denki Kabushiki Kaisha
- Kazuya Ishihara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Communication control processor
- Patent number 5,048,010
- Issue date Sep 10, 1991
- Mitsubishi Denki Kabushiki Kaisha
- Takeo Nakabayashi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Content addressable memory with flag storage to indicate memory state
- Patent number 4,975,873
- Issue date Dec 4, 1990
- Mitsubishi Denki Kabushiki Kaisha
- Takeo Nakabayashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Driver circuit receiving input voltage and providing corresponding...
- Patent number 4,972,517
- Issue date Nov 20, 1990
- Mitsubishi Denki Kabushiki Kaisha
- Harufusa Kondou
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Input circuit operable under different source voltages in semicondu...
- Patent number 4,965,469
- Issue date Oct 23, 1990
- Mitsubishi Denki Kabushiki Kaisha
- Harufusa Kondoh
- G05 - CONTROLLING REGULATING
Information Patent Grant
Terminal equipment identifier control circuit
- Patent number 4,963,862
- Issue date Oct 16, 1990
- Mitsubishi Denki Kabushiki Kaisha
- Takeo Nakabayashi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital signal decoding method and circuit therefor
- Patent number 4,943,965
- Issue date Jul 24, 1990
- Mitsubishi Denki Kabushiki Kaisha
- Hirohisa Machida
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Terminal equipment identifier controlling circuit
- Patent number 4,879,715
- Issue date Nov 7, 1989
- Mitsubishi Denki Kabushiki Kaisha
- Takeo Nakabayashi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Variable delay circuit for delaying input data
- Patent number 4,876,670
- Issue date Oct 24, 1989
- Mitsubishi Denki Kabushiki Kaisha
- Takeo Nakabayashi
- G11 - INFORMATION STORAGE
Information Patent Grant
Standard cell system large scale integrated circuit with heavy load...
- Patent number 4,870,300
- Issue date Sep 26, 1989
- Mitsubishi Denki Kabushiki Kaisha
- Masao Nakaya
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Clock signal generator
- Patent number 4,866,310
- Issue date Sep 12, 1989
- Mitsubishi Denki Kabushiki Kaisha
- Hideki Ando
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Periodic signal generator circuit
- Patent number 4,827,157
- Issue date May 2, 1989
- Mitsubishi Denki Kabushiki Kaisha
- Hirohisa Machida
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Biodirectional elastic store circuit
- Patent number 4,819,208
- Issue date Apr 4, 1989
- Mitsubishi Denki Kabushiki Kaisha
- Takeo Nakabayashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Comparator circuit
- Patent number 4,816,701
- Issue date Mar 28, 1989
- Mitsubishi Denki Kabushiki Kaisha
- Hideki Ando
- G01 - MEASURING TESTING
Information Patent Grant
Address comparator
- Patent number 4,771,402
- Issue date Sep 13, 1988
- Mitsubishi Denki Kabushiki Kaisha
- Takeo Nakabayashi
- G06 - COMPUTING CALCULATING COUNTING

Takeo Nakabayashi

Person

Patents Grantslast 30 patents

Switch and switching method

ATM protocol processing method and ATM protocol processing apparatus

Interface board and instruction processing device without a local CPU

Protocol processor in communication network transferring data in as...

Semiconductor integrated circuit for developing a system using a mi...

I/O device interface having buffer mapped in processor memory addre...

Semiconductor integrated circuit for central processor interfacing...

Semiconductor integrated circuit operating in synchronism with a re...

Data length detection device for detecting length of frame data def...

Signal generator for generating pulse signals having particular wav...

Error check code generating device and transmission error detecting...

Bus circuit and operating method thereof

Communication control processor

Content addressable memory with flag storage to indicate memory state

Driver circuit receiving input voltage and providing corresponding...

Input circuit operable under different source voltages in semicondu...

Terminal equipment identifier control circuit

Digital signal decoding method and circuit therefor

Terminal equipment identifier controlling circuit

Variable delay circuit for delaying input data

Standard cell system large scale integrated circuit with heavy load...

Clock signal generator

Periodic signal generator circuit

Biodirectional elastic store circuit

Comparator circuit

Address comparator