Takeshi Akatsu

Person

St. Nazaire les Eymes, FR

People

Patents Grantslast 30 patents

Information Patent Grant
Method of fabricating a release substrate
- Patent number 8,012,289
- Issue date Sep 6, 2011
- S.O.I. Tec Silicon on Insulator Technologies
- Olivier Rayssac
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating a semiconductor on insulator wafer
- Patent number 7,776,716
- Issue date Aug 17, 2010
- S.O.I. Tec Silicon on Insulator Technologies
- Chrystel Deguet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Recycling by mechanical means of a wafer comprising a multilayer st...
- Patent number 7,602,046
- Issue date Oct 13, 2009
- S.O.I. Tec Silicon on Insulator Technologies
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a release substrate
- Patent number 7,544,265
- Issue date Jun 9, 2009
- S.O.I. Tec Silicon on Insulator Technologies
- Takeshi Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-gate FET with multi-layer channel
- Patent number 7,476,930
- Issue date Jan 13, 2009
- S.O.I. Tec Silicon on Insulator Technologies
- Fréderic Allibert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Atomic implantation and thermal treatment of a semiconductor layer
- Patent number 7,449,394
- Issue date Nov 11, 2008
- S.O.I. Tec Silicon on Insulator Technologies
- Takeshi Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Recycling a wafer comprising a buffer layer, after having separated...
- Patent number 7,378,729
- Issue date May 27, 2008
- S.O.I. Tec Silicon on Insulator Technologies
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Recycling by mechanical means of a wafer comprising a multilayer st...
- Patent number 7,375,008
- Issue date May 20, 2008
- S.O.I. Tec Silicon on Insulator Technologies
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thin layer transfer method utilizing co-implantation to reduce blis...
- Patent number 7,326,628
- Issue date Feb 5, 2008
- S.O.I. Tec Silicon on Insulator Technologies
- Nadia Ben Mohamed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of layer transfer comprising sequential implantations of ato...
- Patent number 7,323,398
- Issue date Jan 29, 2008
- S.O.I. Tec Silicon on Insulator Technologies
- Takeshi Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for thermally treating a semiconductor layer
- Patent number 7,285,495
- Issue date Oct 23, 2007
- S.O.I. Tec Silicon on Insulator Technologies
- Nicolas Daval
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Thermal treatment of a semiconductor layer
- Patent number 7,282,449
- Issue date Oct 16, 2007
- S.O.I. Tec Silicon on Insulator Technologies
- Nicolas Daval
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for forming a semiconductor structure
- Patent number 7,276,428
- Issue date Oct 2, 2007
- S.O.I. Tec Silicon on Insulator Technologies
- Nicolas Daval
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for implanting atomic species through an uneven surface of a...
- Patent number 7,265,435
- Issue date Sep 4, 2007
- S.O.I. Tec Silicon on Insulator Technologies
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Recycling of a wafer comprising a multi-layer structure after takin...
- Patent number 7,256,075
- Issue date Aug 14, 2007
- S.O.I. Tec Silicon on Insulator Technologies
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabrication of a substrate for an epitaxial growth
- Patent number 7,232,488
- Issue date Jun 19, 2007
- S.O.I. Tec Silicon on Insulator Technologies
- Takeshi Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Recycling of a wafer comprising a buffer layer after having separat...
- Patent number 7,033,905
- Issue date Apr 25, 2006
- S.O.I.Tec Silicon on Insulator Technologies S.A.
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for implanting atomic species through an uneven surface of a...
- Patent number 7,018,913
- Issue date Mar 28, 2006
- S.O.I.Tec Silicon on Insulator Technologies S.A.
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Recycling a wafer comprising a buffer layer, after having separated...
- Patent number 7,008,857
- Issue date Mar 7, 2006
- S.O.I.Tec Silicon on Insulator Technologies S.A.
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer with a relaxed useful layer and method of forming the wafer
- Patent number 7,001,826
- Issue date Feb 21, 2006
- S.O.I.Tec Silicon on Insulator Technologies S.A.
- Takeshi Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a multilayer semiconductor structure that...
- Patent number 6,982,210
- Issue date Jan 3, 2006
- S.O.I.Tec Silicon on Insulator Technologies S.A.
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD OF FABRICATING A RELEASE SUBSTRATE
- Publication number 20110233733
- Publication date Sep 29, 2011
- S.O.I.Tec Silicon on Insulator Technologies
- Olivier Rayssac
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FABRICATING A RELEASE SUBSTRATE
- Publication number 20090179299
- Publication date Jul 16, 2009
- Olivier RAYSSAC
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING A SEMICONDUCTOR ON INSULATOR WAFER
- Publication number 20070284660
- Publication date Dec 13, 2007
- Chrystel Deguet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-GATE FET WITH MULTI-LAYER CHANNEL
- Publication number 20070257301
- Publication date Nov 8, 2007
- Frederic Allibert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of fabricating a release substrate
- Publication number 20070077729
- Publication date Apr 5, 2007
- Olivier Rayssac
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Thermal treament of a semiconductor layer
- Publication number 20060141748
- Publication date Jun 29, 2006
- Nicolas Daval
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Recycling a wafer comprising a buffer layer, after having separated...
- Publication number 20060076578
- Publication date Apr 13, 2006
- S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES S.A.
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of layer transfer comprising sequential implantations of ato...
- Publication number 20060063353
- Publication date Mar 23, 2006
- S.O.I. TEC SILICON ON INSULATOR TECHNOLOGIES S.A.
- Takeshi Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Thin layer transfer method utilizing co-implantation to reduce blis...
- Publication number 20060060943
- Publication date Mar 23, 2006
- Nadia Ben Mohamed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for implanting atomic species through an uneven surface of a...
- Publication number 20060051944
- Publication date Mar 9, 2006
- S.O.I.Tec Silicon on Insulator Technologies S.A., a French company
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Compliant substrate for a heteroepitaxial structure and method for...
- Publication number 20060030087
- Publication date Feb 9, 2006
- S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES, S.A.
- Takeshi Akatsu
- C30 - CRYSTAL GROWTH
Information Patent Application
Thermal treatment of a semiconductor layer
- Publication number 20060014363
- Publication date Jan 19, 2006
- Nicolas Daval
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Atomic implantation and thermal treatment of a semiconductor layer
- Publication number 20050245049
- Publication date Nov 3, 2005
- Takeshi Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods for thermally treating a semiconductor layer
- Publication number 20050196936
- Publication date Sep 8, 2005
- Nicolas Daval
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Methods for forming a semiconductor structure
- Publication number 20050196937
- Publication date Sep 8, 2005
- Nicolas Daval
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Recycling by mechanical means of a wafer comprising a multilayer st...
- Publication number 20050189323
- Publication date Sep 1, 2005
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Recycling of a wafer comprising a multi-layer structure after takin...
- Publication number 20050170611
- Publication date Aug 4, 2005
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Recycling of a wafer comprising a multi-layer structure after takin...
- Publication number 20050167002
- Publication date Aug 4, 2005
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Recycling by mechanical means of a wafer comprising a multilayer st...
- Publication number 20050150447
- Publication date Jul 14, 2005
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of fabrication of a substrate for an epitaxial growth
- Publication number 20050066886
- Publication date Mar 31, 2005
- Takeshi Akatsu
- C30 - CRYSTAL GROWTH
Information Patent Application
Method for manufacturing a multilayer semiconductor structure that...
- Publication number 20050009296
- Publication date Jan 13, 2005
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for implanting atomic species through an uneven surface of a...
- Publication number 20050009348
- Publication date Jan 13, 2005
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Recycling a wafer comprising a buffer layer, after having separated...
- Publication number 20040152284
- Publication date Aug 5, 2004
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Compliant substrate for a heteroepitaxial structure and method for...
- Publication number 20040140479
- Publication date Jul 22, 2004
- Takeshi Akatsu
- C30 - CRYSTAL GROWTH
Information Patent Application
Recycling of a wafer comprising a buffer layer after having separat...
- Publication number 20040110378
- Publication date Jun 10, 2004
- Bruno Ghyselen
- C30 - CRYSTAL GROWTH
Information Patent Application
Wafer with a relaxed useful layer and method of forming the wafer
- Publication number 20040067622
- Publication date Apr 8, 2004
- Takeshi Akatsu
- H01 - BASIC ELECTRIC ELEMENTS

Takeshi Akatsu

Person

Patents Grantslast 30 patents

Method of fabricating a release substrate

Method for fabricating a semiconductor on insulator wafer

Recycling by mechanical means of a wafer comprising a multilayer st...

Method of fabricating a release substrate

Multi-gate FET with multi-layer channel

Atomic implantation and thermal treatment of a semiconductor layer

Recycling a wafer comprising a buffer layer, after having separated...

Recycling by mechanical means of a wafer comprising a multilayer st...

Thin layer transfer method utilizing co-implantation to reduce blis...

Method of layer transfer comprising sequential implantations of ato...

Methods for thermally treating a semiconductor layer

Thermal treatment of a semiconductor layer

Methods for forming a semiconductor structure

Method for implanting atomic species through an uneven surface of a...

Recycling of a wafer comprising a multi-layer structure after takin...

Method of fabrication of a substrate for an epitaxial growth

Recycling of a wafer comprising a buffer layer after having separat...

Method for implanting atomic species through an uneven surface of a...

Recycling a wafer comprising a buffer layer, after having separated...

Wafer with a relaxed useful layer and method of forming the wafer

Method for manufacturing a multilayer semiconductor structure that...

Patents Applicationslast 30 patents

METHOD OF FABRICATING A RELEASE SUBSTRATE

METHOD OF FABRICATING A RELEASE SUBSTRATE

METHOD FOR FABRICATING A SEMICONDUCTOR ON INSULATOR WAFER

MULTI-GATE FET WITH MULTI-LAYER CHANNEL

Method of fabricating a release substrate

Thermal treament of a semiconductor layer

Recycling a wafer comprising a buffer layer, after having separated...

Method of layer transfer comprising sequential implantations of ato...

Thin layer transfer method utilizing co-implantation to reduce blis...

Method for implanting atomic species through an uneven surface of a...

Compliant substrate for a heteroepitaxial structure and method for...

Thermal treatment of a semiconductor layer

Atomic implantation and thermal treatment of a semiconductor layer

Methods for thermally treating a semiconductor layer

Methods for forming a semiconductor structure

Recycling by mechanical means of a wafer comprising a multilayer st...

Recycling of a wafer comprising a multi-layer structure after takin...

Recycling of a wafer comprising a multi-layer structure after takin...

Recycling by mechanical means of a wafer comprising a multilayer st...

Method of fabrication of a substrate for an epitaxial growth

Method for manufacturing a multilayer semiconductor structure that...

Method for implanting atomic species through an uneven surface of a...

Recycling a wafer comprising a buffer layer, after having separated...

Compliant substrate for a heteroepitaxial structure and method for...

Recycling of a wafer comprising a buffer layer after having separat...

Wafer with a relaxed useful layer and method of forming the wafer