Takeshi Shimizu

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Special marker message for link aggregation marker protocol
- Patent number 8,451,713
- Issue date May 28, 2013
- Fujitsu Limited
- Yukihiro Nakagawa
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuit design apparatus and circuit design method
- Patent number 8,276,108
- Issue date Sep 25, 2012
- Fujitsu Limited
- Yasushi Umezawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for bypassing an output queue structure of a switch
- Patent number 7,826,468
- Issue date Nov 2, 2010
- Fujitsu Limited
- Takeshi Shimizu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and method for filtering packets in a switching environment
- Patent number 7,742,408
- Issue date Jun 22, 2010
- Fujitsu Limited
- Takashi Miyoshi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Filtering frames at an input port of a switch
- Patent number 7,688,825
- Issue date Mar 30, 2010
- Fujitsu Limited
- Takeshi Shimizu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Memory interleaving in a high-speed switching environment
- Patent number 7,684,424
- Issue date Mar 23, 2010
- Fujitsu Limited
- Takeshi Shimizu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Network based routing scheme
- Patent number 7,664,116
- Issue date Feb 16, 2010
- Fujitsu Limited
- Takeshi Shimizu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Managing shared memory resources in a high-speed switching environment
- Patent number 7,650,413
- Issue date Jan 19, 2010
- Fujitsu Limited
- Yukihiro Nakagawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Purge mechanism in link aggregation group management
- Patent number 7,649,846
- Issue date Jan 19, 2010
- Fujitsu Limited
- Yukihiro Nakagawa
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Distribution-tuning mechanism for link aggregation group management
- Patent number 7,639,614
- Issue date Dec 29, 2009
- Fujitsu Limited
- Yukihiro Nakagawa
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
High speed routing table learning and lookup
- Patent number 7,477,639
- Issue date Jan 13, 2009
- Fujitsu Limited
- Takeshi Shimizu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multicasting in a high-speed switching environment
- Patent number 7,447,201
- Issue date Nov 4, 2008
- Fujitsu Limited
- Yukihiro Nakagawa
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multicasting in a high-speed switching environment
- Patent number 7,440,470
- Issue date Oct 21, 2008
- Fujitsu Limited
- Yukihiro Nakagawa
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Address learning to enable high speed routing table lookups
- Patent number 7,408,930
- Issue date Aug 5, 2008
- Fujitsu Limited
- Sridhar Pathi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Fault containment and error handling in a partitioned system with s...
- Patent number 7,380,001
- Issue date May 27, 2008
- Fujitsu Limited
- Kazunori Masuyama
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Fault containment and error handling in a partitioned system with s...
- Patent number 7,315,895
- Issue date Jan 1, 2008
- Fujitsu Limited
- Kazunori Masuyama
Information Patent Grant
Memory interleaving in a high-speed switching environment
- Patent number 7,248,596
- Issue date Jul 24, 2007
- Fujitsu Limited
- Takeshi Shimizu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Architecture for switching packets in a high-speed switching enviro...
- Patent number 7,242,684
- Issue date Jul 10, 2007
- Fujitsu Limited
- Yukihiro Nakagawa
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and method for low overhead message passing between domains...
- Patent number 7,194,517
- Issue date Mar 20, 2007
- Fujitsu Limited
- Patrick N. Conway
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Routing mechanism for static load balancing in a partitioned comput...
- Patent number 7,159,017
- Issue date Jan 2, 2007
- Fujitsu Limited
- Hitoshi Oi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and system for logical partitioning of cache memory structur...
- Patent number 6,754,776
- Issue date Jun 22, 2004
- Fujitsu Limited
- Patrick N. Conway
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for over-run protection in a message passing mult...
- Patent number 6,715,008
- Issue date Mar 30, 2004
- Fujitsu Ltd.
- Takeshi Shimizu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and method for avoiding deadlock in multi-node network
- Patent number 6,490,630
- Issue date Dec 3, 2002
- Fujitsu Limited
- Wing Leong Poon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous packet switching
- Patent number 5,959,995
- Issue date Sep 28, 1999
- Fujitsu, Ltd.
- Thomas M. Wicki
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for detection of errors in multiple-word commu...
- Patent number 5,931,967
- Issue date Aug 3, 1999
- Fujitsu, Ltd.
- Takeshi Shimizu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
System and Method for Filtering Packets in a Switching Environment
- Publication number 20080123525
- Publication date May 29, 2008
- Takashi Miyoshi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
System and Method for Bypassing an Output Queue Structure of a Switch
- Publication number 20080031269
- Publication date Feb 7, 2008
- Takeshi Shimizu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MEMORY INTERLEAVING IN A HIGH-SPEED SWITCHING ENVIRONMENT
- Publication number 20080013561
- Publication date Jan 17, 2008
- Fujitsu Limited
- Takeshi Shimizu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
System and Method for Allocating Memory Resources in a Switching En...
- Publication number 20070268926
- Publication date Nov 22, 2007
- FUJITSU LIMITED
- Yukihiro Nakagawa
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Distribution-tuning mechanism for link aggregation group management
- Publication number 20060251106
- Publication date Nov 9, 2006
- FUJITSU LIMITED
- Yukihiro Nakagawa
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Filtering Frames at an Input Port of a Switch
- Publication number 20060227777
- Publication date Oct 12, 2006
- FUJITSU LIMITED
- Takeshi Shimizu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Special marker message for link aggregation marker protocol
- Publication number 20060227704
- Publication date Oct 12, 2006
- FUJITSU LIMITED
- Yukihiro Nakagawa
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Purge mechanism in link aggregation group management
- Publication number 20060227711
- Publication date Oct 12, 2006
- FUJITSU LIMITED
- Yukihiro Nakagawa
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Network based routing scheme
- Publication number 20060227779
- Publication date Oct 12, 2006
- FUJITSU LIMITED
- Takeshi Shimizu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Limited cyclical redundancy checksum (CRC) modification to support...
- Publication number 20050213595
- Publication date Sep 29, 2005
- Takeshi Shimizu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
High speed routing table learning and lookup
- Publication number 20040160954
- Publication date Aug 19, 2004
- FUJITSU LIMITED
- Takeshi Shimizu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Multicasting in a high-speed switching environment
- Publication number 20040156369
- Publication date Aug 12, 2004
- FUJITSU LIMITED
- Yukihiro Nakagawa
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Multicasting in a high-speed switching environment
- Publication number 20040156383
- Publication date Aug 12, 2004
- FUJITSU LIMITED
- Yukihiro Nakagawa
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Address learning to enable high speed routing table lookups
- Publication number 20040156362
- Publication date Aug 12, 2004
- FUJITSU LIMITED
- Sridhar Pathi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Managing shared memory resources in a high-speed switching environment
- Publication number 20040158636
- Publication date Aug 12, 2004
- FUJITSU LIMITED
- Yukihiro Nakagawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory interleaving in a high-speed switching environment
- Publication number 20040156361
- Publication date Aug 12, 2004
- FUJITSU LIMITED
- Takeshi Shimizu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Architecture for switching packets in a high-speed switching enviro...
- Publication number 20040156358
- Publication date Aug 12, 2004
- FUJITSU LIMITED
- Yukihiro Nakagawa
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
System and method for low overhead message passing between domains...
- Publication number 20030023666
- Publication date Jan 30, 2003
- Patrick N. Conway
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Routing mechanism for static load balancing in a partitioned comput...
- Publication number 20030007493
- Publication date Jan 9, 2003
- Hitoshi Oi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Fault containment and error handling in a partitioned system with s...
- Publication number 20020186711
- Publication date Dec 12, 2002
- Kazunori Masuyama
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND SYSTEM FOR OVER-RUN PROTECTION IN AMESSAGE PASSING MULTI...
- Publication number 20020178306
- Publication date Nov 28, 2002
- TAKESHI SHIMIZU
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and system for logical partitioning of cache memory structur...
- Publication number 20020174301
- Publication date Nov 21, 2002
- Patrick N. Conway
- G06 - COMPUTING CALCULATING COUNTING

Takeshi Shimizu

Person

Patents Grantslast 30 patents

Special marker message for link aggregation marker protocol

Circuit design apparatus and circuit design method

System and method for bypassing an output queue structure of a switch

System and method for filtering packets in a switching environment

Filtering frames at an input port of a switch

Memory interleaving in a high-speed switching environment

Network based routing scheme

Managing shared memory resources in a high-speed switching environment

Purge mechanism in link aggregation group management

Distribution-tuning mechanism for link aggregation group management

High speed routing table learning and lookup

Multicasting in a high-speed switching environment

Multicasting in a high-speed switching environment

Address learning to enable high speed routing table lookups

Fault containment and error handling in a partitioned system with s...

Fault containment and error handling in a partitioned system with s...

Memory interleaving in a high-speed switching environment

Architecture for switching packets in a high-speed switching enviro...

System and method for low overhead message passing between domains...

Routing mechanism for static load balancing in a partitioned comput...

Method and system for logical partitioning of cache memory structur...

Method and system for over-run protection in a message passing mult...

System and method for avoiding deadlock in multi-node network

Asynchronous packet switching

Method and apparatus for detection of errors in multiple-word commu...

Patents Applicationslast 30 patents

System and Method for Filtering Packets in a Switching Environment

System and Method for Bypassing an Output Queue Structure of a Switch

MEMORY INTERLEAVING IN A HIGH-SPEED SWITCHING ENVIRONMENT

System and Method for Allocating Memory Resources in a Switching En...

Distribution-tuning mechanism for link aggregation group management

Filtering Frames at an Input Port of a Switch

Special marker message for link aggregation marker protocol

Purge mechanism in link aggregation group management

Network based routing scheme

Limited cyclical redundancy checksum (CRC) modification to support...

High speed routing table learning and lookup

Multicasting in a high-speed switching environment

Multicasting in a high-speed switching environment

Address learning to enable high speed routing table lookups

Managing shared memory resources in a high-speed switching environment

Memory interleaving in a high-speed switching environment

Architecture for switching packets in a high-speed switching enviro...

System and method for low overhead message passing between domains...

Routing mechanism for static load balancing in a partitioned comput...

Fault containment and error handling in a partitioned system with s...

METHOD AND SYSTEM FOR OVER-RUN PROTECTION IN AMESSAGE PASSING MULTI...

Method and system for logical partitioning of cache memory structur...