Tapan J. Chakraborty

Follow

Person

San Diego, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Zero-pin test solution for integrated circuits
- Patent number 11,041,904
- Issue date Jun 22, 2021
- QUALCOMM Incorporated
- Tapan Jyoti Chakraborty
- G01 - MEASURING TESTING
Information Patent Grant
Efficient test architecture for multi-die chips
- Patent number 10,429,441
- Issue date Oct 1, 2019
- QUALCOMM Incorporated
- Tapan Jyoti Chakraborty
- G01 - MEASURING TESTING
Information Patent Grant
Embedded memory testing with storage borrowing
- Patent number 10,249,380
- Issue date Apr 2, 2019
- QUALCOMM Incorporated
- Tapan Jyoti Chakraborty
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for characterizing thermal marginality in an i...
- Patent number 9,285,418
- Issue date Mar 15, 2016
- QUALCOMM Incorporated
- Tapan J Chakraborty
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
ZERO-PIN TEST SOLUTION FOR INTEGRATED CIRCUITS
- Publication number 20210096182
- Publication date Apr 1, 2021
- QUALCOMM Incorporated
- Tapan Jyoti CHAKRABORTY
- G01 - MEASURING TESTING
Information Patent Application
EFFICIENT TEST ARCHITECTURE FOR MULTI-DIE CHIPS
- Publication number 20180340977
- Publication date Nov 29, 2018
- QUALCOMM Incorporated
- Tapan Jyoti Chakraborty
- G01 - MEASURING TESTING
Information Patent Application
Embedded Memory Testing with Storage Borrowing
- Publication number 20180218778
- Publication date Aug 2, 2018
- QUALCOMM Incorporated
- Tapan Jyoti Chakraborty
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR CHARACTERIZING THERMAL MARGINALITY IN AN I...
- Publication number 20130285687
- Publication date Oct 31, 2013
- QUALCOMM Incorporated
- Tapan J. Chakraborty
- G01 - MEASURING TESTING