Tapan Jyoti Chakraborty

Person

West Windsor, NJ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for describing components adapted for dynamica...
- Patent number 7,962,885
- Issue date Jun 14, 2011
- Alcatel-Lucent USA Inc.
- Tapan J. Chakraborty
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for describing and testing a system-on-chip
- Patent number 7,958,479
- Issue date Jun 7, 2011
- Alcatel-Lucent USA Inc.
- Tapan J. Chakraborty
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus and method for isolating portions of a scan path of a sys...
- Patent number 7,958,417
- Issue date Jun 7, 2011
- Alcatel-Lucent USA Inc.
- Tapan Chakraborty
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus and method for controlling dynamic modification of a scan...
- Patent number 7,954,022
- Issue date May 31, 2011
- Alcatel-Lucent USA Inc.
- Tapan Chakraborty
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for describing parallel access to a system-on-...
- Patent number 7,949,915
- Issue date May 24, 2011
- Alcatel-Lucent USA Inc.
- Tapan J. Chakraborty
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for injecting transient hardware faults for so...
- Patent number 7,689,866
- Issue date Mar 30, 2010
- Alcatel-Lucent USA Inc.
- Tapan Jyoti Chakraborty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fault-tolerant architecture of flip-flops for transient pulses and...
- Patent number 7,594,150
- Issue date Sep 22, 2009
- Alcatel-Lucent USA Inc.
- Tapan Jyoti Chakraborty
- G01 - MEASURING TESTING
Information Patent Grant
Soft error tolerant flip flops
- Patent number 7,482,831
- Issue date Jan 27, 2009
- Alcatel-Lucent USA Inc.
- Tapan Jyoti Chakraborty
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fault injection method and system
- Patent number 7,284,159
- Issue date Oct 16, 2007
- Lucent Technologies Inc.
- Tapan J. Chakraborty
- G01 - MEASURING TESTING
Information Patent Grant
Method and system for testing cluster circuits in a boundary scan e...
- Patent number 6,378,094
- Issue date Apr 23, 2002
- Lucent Technologies Inc.
- Tapan Jyoti Chakraborty
- G01 - MEASURING TESTING
Information Patent Grant
Arrangement for fault detection in circuit interconnections
- Patent number 6,167,542
- Issue date Dec 26, 2000
- Lucent Technologies
- Tapan Jyoti Chakraborty
- G01 - MEASURING TESTING
Information Patent Grant
Bist architecture for detecting path-delay faults in a sequential c...
- Patent number 6,148,425
- Issue date Nov 14, 2000
- Lucent Technologies Inc.
- Sudipta Bhawmik
- G01 - MEASURING TESTING
Information Patent Grant
Testing of live circuit boards
- Patent number 6,124,715
- Issue date Sep 26, 2000
- Lucent Technologies, Inc.
- Tapan Jyoti Chakraborty
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
APPARATUS AND METHOD FOR CONTROLLING DYNAMIC MODIFICATION OF A SCAN...
- Publication number 20090193306
- Publication date Jul 30, 2009
- Tapan Chakraborty
- G01 - MEASURING TESTING
Information Patent Application
Apparatus and Method for Isolating Portions of a Scan Path of a Sys...
- Publication number 20090193304
- Publication date Jul 30, 2009
- Tapan Chakraborty
- G01 - MEASURING TESTING
Information Patent Application
Method and apparatus for describing parallel access to a system-on-...
- Publication number 20090144593
- Publication date Jun 4, 2009
- Tapan J. Chakraborty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Describing Components Adapted for Dynamica...
- Publication number 20090144592
- Publication date Jun 4, 2009
- Tapan J. Chakraborty
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND APPARATUS FOR DESCRIBING AND TESTING A SYSTEM-ON-CHIP
- Publication number 20090144594
- Publication date Jun 4, 2009
- Tapan J. Chakraborty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR INJECTING TRANSIENT HARDWARE FAULTS FOR SO...
- Publication number 20080155328
- Publication date Jun 26, 2008
- Tapan Jyoti Chakraborty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Soft error tolerant flip flops
- Publication number 20070262787
- Publication date Nov 15, 2007
- LUCENT TECHNOLOGIES INC.
- Tapan Jyoti Chakraborty
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Fault-tolerant architecture of flip-flops for transient pulses and...
- Publication number 20070266282
- Publication date Nov 15, 2007
- LUCENT TECHNOLOGIES INC.
- Tapan Jyoti Chakraborty
- G01 - MEASURING TESTING
Information Patent Application
Fault injection method and system
- Publication number 20050050393
- Publication date Mar 3, 2005
- Tapan J. Chakraborty
- G01 - MEASURING TESTING

Tapan Jyoti Chakraborty

Person

Patents Grantslast 30 patents

Method and apparatus for describing components adapted for dynamica...

Method and apparatus for describing and testing a system-on-chip

Apparatus and method for isolating portions of a scan path of a sys...

Apparatus and method for controlling dynamic modification of a scan...

Method and apparatus for describing parallel access to a system-on-...

Method and apparatus for injecting transient hardware faults for so...

Fault-tolerant architecture of flip-flops for transient pulses and...

Soft error tolerant flip flops

Fault injection method and system

Method and system for testing cluster circuits in a boundary scan e...

Arrangement for fault detection in circuit interconnections

Bist architecture for detecting path-delay faults in a sequential c...

Testing of live circuit boards

Patents Applicationslast 30 patents

APPARATUS AND METHOD FOR CONTROLLING DYNAMIC MODIFICATION OF A SCAN...

Apparatus and Method for Isolating Portions of a Scan Path of a Sys...

Method and apparatus for describing parallel access to a system-on-...

Method and Apparatus for Describing Components Adapted for Dynamica...

METHOD AND APPARATUS FOR DESCRIBING AND TESTING A SYSTEM-ON-CHIP

METHOD AND APPARATUS FOR INJECTING TRANSIENT HARDWARE FAULTS FOR SO...

Soft error tolerant flip flops

Fault-tolerant architecture of flip-flops for transient pulses and...

Fault injection method and system