Tarek Eldin

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San Jose, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Method for determining interconnect line performance within an inte...
- Patent number 7,373,538
- Issue date May 13, 2008
- Xilinx, Inc.
- Tarek Eldin
- G01 - MEASURING TESTING
Information Patent Grant
Method of automatic fault isolation in a programmable logic device
- Patent number 7,246,285
- Issue date Jul 17, 2007
- Xilinx, Inc.
- Tarek Eldin
- G01 - MEASURING TESTING