Tatsuya URAKAWA

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Kawasaki-shi, JP

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Patents Grantslast 30 patents

Information Patent Grant
Logic circuit and semiconductor integrated circuit
- Patent number 8,922,241
- Issue date Dec 30, 2014
- Renesas Electronics Corporation
- Tatsuya Urakawa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Down converter and control method of the same
- Patent number 8,766,676
- Issue date Jul 1, 2014
- Renesas Electronics Corporation
- Yoshiaki Nakamura
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase locked loop frequency synthesizer
- Patent number 7,292,119
- Issue date Nov 6, 2007
- NEC Electronics Corporation
- Tatsuya Urakawa
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
DOWN CONVERTER AND CONTROL METHOD OF THE SAME
- Publication number 20130335124
- Publication date Dec 19, 2013
- RENESAS ELECTRONICS CORPORATION
- Yoshiaki NAKAMURA
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOGIC CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT
- Publication number 20130082734
- Publication date Apr 4, 2013
- RENESAS ELECTRONICS CORPORATION
- Tatsuya URAKAWA
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
RECEIVER AND SEMICONDUCTOR DEVICE
- Publication number 20110085625
- Publication date Apr 14, 2011
- RENESAS ELECTRONICS CORPORATION
- Tatsuya URAKAWA
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Phase locked loop frequency synthesizer
- Publication number 20050219003
- Publication date Oct 6, 2005
- NEC Compound Semiconductor Devices, Ltd.
- Tatsuya Urakawa
- H03 - BASIC ELECTRONIC CIRCUITRY