Tawalin Opastrakoon

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Diagonal page mapping in memory systems
- Patent number 12,353,753
- Issue date Jul 8, 2025
- Micron Technology, Inc.
- Tawalin Opastrakoon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Varying memory erase depth according to block characteristics
- Patent number 12,169,629
- Issue date Dec 17, 2024
- Micron Technology, Inc.
- Sriteja Yamparala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power integrity monitoring
- Patent number 12,086,427
- Issue date Sep 10, 2024
- Micron Technology, Inc.
- Sriteja Yamparala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Accelerating configuration updates for memory devices
- Patent number 11,984,174
- Issue date May 14, 2024
- Micron Technology, Inc.
- Tawalin Opastrakoon
- G11 - INFORMATION STORAGE
Information Patent Grant
Optimized storage charge loss management
- Patent number 11,923,030
- Issue date Mar 5, 2024
- Micron Technology, Inc.
- Gary F. Besinga
- G11 - INFORMATION STORAGE
Information Patent Grant
Open block management using storage charge loss margin checking
- Patent number 11,715,531
- Issue date Aug 1, 2023
- Micron Technology, Inc.
- Christopher M. Smitchger
- G11 - INFORMATION STORAGE
Information Patent Grant
Workload adaptive scans for memory sub-systems
- Patent number 11,715,541
- Issue date Aug 1, 2023
- Micron Technology, Inc.
- Renato C. Padilla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic program-verify voltage adjustment for intra-block storage c...
- Patent number 11,687,452
- Issue date Jun 27, 2023
- Micron Technology, Inc.
- Gary F. Besinga
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Diagonal page mapping in memory systems
- Patent number 11,507,304
- Issue date Nov 22, 2022
- Micron Technology, Inc.
- Tawalin Opastrakoon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimized storage charge loss management
- Patent number 11,456,051
- Issue date Sep 27, 2022
- Micron Technology, Inc.
- Gary F. Besinga
- G11 - INFORMATION STORAGE
Information Patent Grant
Workload adaptive scans for memory sub-systems
- Patent number 11,393,548
- Issue date Jul 19, 2022
- Micron Technology, Inc.
- Renato C. Padilla
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
REUSING PARTIALLY FILLED SUPERBLOCKS FOR PROGRAMMING
- Publication number 20250201311
- Publication date Jun 19, 2025
- Micron Technology, Inc.
- Tawalin Opastrakoon
- G11 - INFORMATION STORAGE
Information Patent Application
BLOCK-EFFICIENT WRITE POLICIES FOR MEMORY DEVICES
- Publication number 20250181240
- Publication date Jun 5, 2025
- Micron Technology, Inc.
- Gary F. Besinga
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VARYING MEMORY ERASE DEPTH ACCORDING TO BLOCK CHARACTERISTICS
- Publication number 20250060875
- Publication date Feb 20, 2025
- Micron Technology, Inc.
- Sriteja Yamparala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER INTEGRITY MONITORING
- Publication number 20240427507
- Publication date Dec 26, 2024
- Micron Technology, Inc.
- Sriteja Yamparala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCELERATING CONFIGURATION UPDATES FOR MEMORY DEVICES
- Publication number 20240257887
- Publication date Aug 1, 2024
- Micron Technology, Inc.
- Tawalin Opastrakoon
- G11 - INFORMATION STORAGE
Information Patent Application
VARYING MEMORY ERASE DEPTH ACCORDING TO BLOCK CHARACTERISTICS
- Publication number 20240069730
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Sriteja Yamparala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR HANDLING
- Publication number 20230393922
- Publication date Dec 7, 2023
- Micron Technology, Inc.
- Sampath K. Ratnam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER INTEGRITY MONITORING
- Publication number 20230266890
- Publication date Aug 24, 2023
- Micron Technology, Inc.
- Sriteja Yamparala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIAGONAL PAGE MAPPING IN MEMORY SYSTEMS
- Publication number 20230049877
- Publication date Feb 16, 2023
- Micron Technology, Inc.
- Tawalin Opastrakoon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIAGONAL PAGE MAPPING IN MEMORY SYSTEMS
- Publication number 20220391127
- Publication date Dec 8, 2022
- Micron Technology, Inc.
- Tawalin Opastrakoon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTIMIZED STORAGE CHARGE LOSS MANAGEMENT
- Publication number 20220392561
- Publication date Dec 8, 2022
- Micron Technology, Inc.
- Gary F. Besinga
- G11 - INFORMATION STORAGE
Information Patent Application
WORKLOAD ADAPTIVE SCANS FOR MEMORY SUB-SYSTEMS
- Publication number 20220351796
- Publication date Nov 3, 2022
- Micron Technology, Inc.
- Renato C. Padilla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPEN BLOCK MANAGEMENT USING STORAGE CHARGE LOSS MARGIN CHECKING
- Publication number 20220310183
- Publication date Sep 29, 2022
- Micron Technology, Inc.
- Christopher M. Smitchger
- G11 - INFORMATION STORAGE
Information Patent Application
OPTIMIZED STORAGE CHARGE LOSS MANAGEMENT
- Publication number 20220310190
- Publication date Sep 29, 2022
- Micron Technology, Inc.
- Gary F. Besinga
- G11 - INFORMATION STORAGE
Information Patent Application
ACCELERATING CONFIGURATION UPDATES FOR MEMORY DEVICES
- Publication number 20220284974
- Publication date Sep 8, 2022
- Micron Technology, Inc.
- Tawalin Opastrakoon
- G11 - INFORMATION STORAGE
Information Patent Application
WORKLOAD ADAPTIVE SCANS FOR MEMORY SUB-SYSTEMS
- Publication number 20220199179
- Publication date Jun 23, 2022
- Micron Technology, Inc.
- Renato C. Padilla
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC PROGRAM-VERIFY VOLTAGE ADJUSTMENT FOR INTRA-BLOCK STORAGE C...
- Publication number 20220188226
- Publication date Jun 16, 2022
- Micron Technology, Inc.
- Gary F. Besinga
- G06 - COMPUTING CALCULATING COUNTING

Tawalin Opastrakoon

Person

Patents Grantslast 30 patents

Diagonal page mapping in memory systems

Varying memory erase depth according to block characteristics

Power integrity monitoring

Accelerating configuration updates for memory devices

Optimized storage charge loss management

Open block management using storage charge loss margin checking

Workload adaptive scans for memory sub-systems

Dynamic program-verify voltage adjustment for intra-block storage c...

Diagonal page mapping in memory systems

Optimized storage charge loss management

Workload adaptive scans for memory sub-systems

Patents Applicationslast 30 patents

REUSING PARTIALLY FILLED SUPERBLOCKS FOR PROGRAMMING

BLOCK-EFFICIENT WRITE POLICIES FOR MEMORY DEVICES

VARYING MEMORY ERASE DEPTH ACCORDING TO BLOCK CHARACTERISTICS

POWER INTEGRITY MONITORING

ACCELERATING CONFIGURATION UPDATES FOR MEMORY DEVICES

VARYING MEMORY ERASE DEPTH ACCORDING TO BLOCK CHARACTERISTICS

ERROR HANDLING

POWER INTEGRITY MONITORING

DIAGONAL PAGE MAPPING IN MEMORY SYSTEMS

DIAGONAL PAGE MAPPING IN MEMORY SYSTEMS

OPTIMIZED STORAGE CHARGE LOSS MANAGEMENT

WORKLOAD ADAPTIVE SCANS FOR MEMORY SUB-SYSTEMS

OPEN BLOCK MANAGEMENT USING STORAGE CHARGE LOSS MARGIN CHECKING

OPTIMIZED STORAGE CHARGE LOSS MANAGEMENT

ACCELERATING CONFIGURATION UPDATES FOR MEMORY DEVICES

WORKLOAD ADAPTIVE SCANS FOR MEMORY SUB-SYSTEMS

DYNAMIC PROGRAM-VERIFY VOLTAGE ADJUSTMENT FOR INTRA-BLOCK STORAGE C...