Te Khac Ma

Person

Allentown, PA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Multi-core communication acceleration using hardware queue device
- Patent number 10,929,323
- Issue date Feb 23, 2021
- Intel Corporation
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-core communication acceleration using hardware queue device
- Patent number 10,445,271
- Issue date Oct 15, 2019
- Intel Corporation
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for dynamically balancing task processing whil...
- Patent number 10,437,638
- Issue date Oct 8, 2019
- Intel Corporation
- William G. Burroughs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for a distributed hardware queue manager
- Patent number 10,216,668
- Issue date Feb 26, 2019
- Intel Corporation
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Changing a flow identifier of a packet in a multi-thread, multi-flo...
- Patent number 8,949,582
- Issue date Feb 3, 2015
- LSI Corporation
- Deepak Mital
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Instruction breakpoints in a multi-core, multi-thread network commu...
- Patent number 8,868,889
- Issue date Oct 21, 2014
- LSI Corporation
- Deepak Mital
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Reducing data read latency in a network communications processor ar...
- Patent number 8,505,013
- Issue date Aug 6, 2013
- LSI Corporation
- Steven Pollock
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
LOAD BALANCER
- Publication number 20230401109
- Publication date Dec 14, 2023
- Intel Corporation
- Niall D. MCDONNELL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE COMMUNICATION ACCELERATION USING HARDWARE QUEUE DEVICE
- Publication number 20200042479
- Publication date Feb 6, 2020
- Intel Corporation
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR DYNAMICALLY BALANCING TASK PROCESSING WHIL...
- Publication number 20180365053
- Publication date Dec 20, 2018
- Intel Corporation
- William G. Burroughs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR A DISTRIBUTED HARDWARE QUEUE MANAGER
- Publication number 20170286337
- Publication date Oct 5, 2017
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE COMMUNICATION ACCELERATION USING HARDWARE QUEUE DEVICE
- Publication number 20170192921
- Publication date Jul 6, 2017
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Changing a Flow Identifier of a Packet in a Multi-Thread, Multi-Flo...
- Publication number 20130089098
- Publication date Apr 11, 2013
- LSI Corporation
- Deepak Mital
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING DATA READ LATENCY IN A NETWORK COMMUNICATIONS PROCESSOR AR...
- Publication number 20110225588
- Publication date Sep 15, 2011
- LSI CORPORATION
- Steven Pollock
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION BREAKPOINTS IN A MULTI-CORE, MULTI-THREAD NETWORK COMMU...
- Publication number 20110225394
- Publication date Sep 15, 2011
- Deepak Mital
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Multi-core communication acceleration using hardware queue device

Multi-core communication acceleration using hardware queue device

Method and apparatus for dynamically balancing task processing whil...

Technologies for a distributed hardware queue manager

Changing a flow identifier of a packet in a multi-thread, multi-flo...

Instruction breakpoints in a multi-core, multi-thread network commu...

Reducing data read latency in a network communications processor ar...

Patents Applicationslast 30 patents

LOAD BALANCER

MULTI-CORE COMMUNICATION ACCELERATION USING HARDWARE QUEUE DEVICE

METHOD AND APPARATUS FOR DYNAMICALLY BALANCING TASK PROCESSING WHIL...

TECHNOLOGIES FOR A DISTRIBUTED HARDWARE QUEUE MANAGER

MULTI-CORE COMMUNICATION ACCELERATION USING HARDWARE QUEUE DEVICE

Changing a Flow Identifier of a Packet in a Multi-Thread, Multi-Flo...

REDUCING DATA READ LATENCY IN A NETWORK COMMUNICATIONS PROCESSOR AR...

INSTRUCTION BREAKPOINTS IN A MULTI-CORE, MULTI-THREAD NETWORK COMMU...