Terry M. Grunzke

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Devices, systems, and methods for encoding and decoding codewords
- Patent number 12,308,857
- Issue date May 20, 2025
- Microsoft Technology Licensing, LLC
- Brett K. Dodds
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus having selectively-activated termination circuitry
- Patent number 12,235,760
- Issue date Feb 25, 2025
- Lodestar Licensing Group LLC
- Terry Grunzke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Read retry scratch space
- Patent number 12,111,725
- Issue date Oct 8, 2024
- Micron Technology, Inc.
- Rahul Mitchell Jairaj
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods of entering unselected memories into a diff...
- Patent number 11,650,653
- Issue date May 16, 2023
- Micron Technology, Inc.
- Terry M. Grunzke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Read retry scratch space
- Patent number 11,586,498
- Issue date Feb 21, 2023
- Micron Technology, Inc.
- Rahul Mitchell Jairaj
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods to control memory operations on buffers
- Patent number 11,556,251
- Issue date Jan 17, 2023
- Micron Technology, Inc.
- Ali Mohammadzadeh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partially written block treatment
- Patent number 11,416,154
- Issue date Aug 16, 2022
- Micron Technology, Inc.
- Sivagnanam Parthasarathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory devices having selectively-activated termination devices
- Patent number 11,379,366
- Issue date Jul 5, 2022
- Micron Technology, Inc.
- Terry Grunzke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for automated dynamic word line start voltage
- Patent number 11,264,099
- Issue date Mar 1, 2022
- Micron Technology, Inc.
- Dheeraj Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory devices configured to test data path integrity
- Patent number 11,238,949
- Issue date Feb 1, 2022
- Micron Technology, Inc.
- Terry Grunzke
- G11 - INFORMATION STORAGE
Information Patent Grant
At-risk memory location identification and management
- Patent number 11,107,549
- Issue date Aug 31, 2021
- Microsoft Technology Licensing, LLC
- Timothy B. Cowles
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods of entering unselected memories into a diff...
- Patent number 11,099,626
- Issue date Aug 24, 2021
- Micron Technology, Inc.
- Terry M. Grunzke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus having memory arrays and having trim registers associated...
- Patent number 11,031,081
- Issue date Jun 8, 2021
- Terry Grunzke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods to control memory operations on buffers
- Patent number 10,936,210
- Issue date Mar 2, 2021
- Micron Technology, Inc.
- Ali Mohammadzadeh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partially written block treatment
- Patent number 10,877,679
- Issue date Dec 29, 2020
- Micron Technology, Inc.
- Sivagnanam Parthasarathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Line termination methods
- Patent number 10,860,479
- Issue date Dec 8, 2020
- Micron Technology, Inc.
- Terry Grunzke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for automated dynamic word line start voltage
- Patent number 10,832,779
- Issue date Nov 10, 2020
- Micron Technology, Inc.
- Dheeraj Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods of verifying data path integrity
- Patent number 10,622,084
- Issue date Apr 14, 2020
- Micron Technology, Inc.
- Terry Grunzke
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus having memory arrays and having trim registers associated...
- Patent number 10,468,105
- Issue date Nov 5, 2019
- Micron Technology, Inc.
- Terry Grunzke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partially written block treatment
- Patent number 10,423,350
- Issue date Sep 24, 2019
- Micron Technology, Inc.
- Sivagnanam Parthasarathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for automated dynamic word line start voltage
- Patent number 10,388,379
- Issue date Aug 20, 2019
- Micron Technology, Inc.
- Dheeraj Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods to control memory operations on buffers
- Patent number 10,372,353
- Issue date Aug 6, 2019
- Micron Technology, Inc.
- Ali Mohammadzadeh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partially written block treatment
- Patent number 10,359,963
- Issue date Jul 23, 2019
- Micron Technology, Inc.
- Sivagnanam Parthasarathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Devices, methods, and systems supporting on unit termination
- Patent number 10,325,635
- Issue date Jun 18, 2019
- Micron Technology, Inc.
- Terry M. Grunzke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods of entering unselected memories into a diff...
- Patent number 10,275,013
- Issue date Apr 30, 2019
- Micron Technology, Inc.
- Terry M. Grunzke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Line termination methods
- Patent number 10,152,414
- Issue date Dec 11, 2018
- Micron Technology, Inc.
- Terry Grunzke
- G11 - INFORMATION STORAGE
Information Patent Grant
Impedance adjustment in a memory device
- Patent number 10,140,225
- Issue date Nov 27, 2018
- Micron Technology, Inc.
- Terry Grunzke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data path integrity verification in memory devices
- Patent number 10,014,070
- Issue date Jul 3, 2018
- Micron Technology, Inc.
- Terry Grunzke
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus for power management
- Patent number 10,014,033
- Issue date Jul 3, 2018
- Micron Technology, Inc.
- Terry Grunzke
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory devices and their operation having trim registers associated...
- Patent number 9,997,246
- Issue date Jun 12, 2018
- Micron Technology, Inc.
- Terry Grunzke
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
ERROR CORRECTION USING ON-DIE PARITY BIT STORAGE AND TRANSITIONAL S...
- Publication number 20250130895
- Publication date Apr 24, 2025
- Microsoft Technology Licensing, LLC
- Majid Anaraki NEMATI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Protecting Data Using Cyclic Properties of Er...
- Publication number 20250110824
- Publication date Apr 3, 2025
- Microsoft Technology Licensing, LLC
- Majid Anaraki Nemati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTIVELY-ACTIVATED TERMINATION CIRCUITRY, AND ASSOCIATED SYSTEMS...
- Publication number 20250045203
- Publication date Feb 6, 2025
- Lodestar Licensing Group LLC
- Terry Grunzke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Low Complexity System and Method for Detection and Correction of Da...
- Publication number 20240419541
- Publication date Dec 19, 2024
- Microsoft Technology Licensing, LLC
- Majid Anaraki Nemati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Protecting Data
- Publication number 20240419539
- Publication date Dec 19, 2024
- Microsoft Technology Licensing, LLC
- Majid Anaraki Nemati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEVICES, SYSTEMS, AND METHODS FOR ENCODING AND DECODING CODEWORDS
- Publication number 20240348267
- Publication date Oct 17, 2024
- Microsoft Technology Licensing, LLC
- Brett K. DODDS
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
READ RETRY SCRATCH SPACE
- Publication number 20230205628
- Publication date Jun 29, 2023
- Micron Technology, Inc.
- Rahul Mitchell Jairaj
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS HAVING SELECTIVELY-ACTIVATED TERMINATION CIRCUITRY
- Publication number 20230016415
- Publication date Jan 19, 2023
- Micron Technology, Inc.
- Terry Grunzke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS OF ENTERING UNSELECTED MEMORIES INTO A DIFF...
- Publication number 20220197365
- Publication date Jun 23, 2022
- Micron Technology, Inc.
- Terry M. Grunzke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MITIGATING ROW-HAMMER ATTACKS
- Publication number 20220113868
- Publication date Apr 14, 2022
- Microsoft Technology Licensing, LLC
- Tim COWLES
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS TO CONTROL MEMORY OPERATIONS ON BUFFERS
- Publication number 20210181955
- Publication date Jun 17, 2021
- Micron Technology, Inc.
- Ali Mohammadzadeh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AT-RISK MEMORY LOCATION IDENTIFICATION AND MANAGEMENT
- Publication number 20210183463
- Publication date Jun 17, 2021
- Microsoft Technology Licensing, LLC
- Timothy B. COWLES
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICES HAVING SELECTIVELY-ACTIVATED TERMINATION DEVICES
- Publication number 20210173774
- Publication date Jun 10, 2021
- Micron Technology, Inc.
- Terry Grunzke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARTIALLY WRITTEN BLOCK TREATMENT
- Publication number 20210103389
- Publication date Apr 8, 2021
- Micron Technology, Inc.
- Sivagnanam Parthasarathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR AUTOMATED DYNAMIC WORD LINE START VOLTAGE
- Publication number 20210057031
- Publication date Feb 25, 2021
- Micron Technology, Inc.
- Dheeraj Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
READ RETRY SCRATCH SPAC
- Publication number 20200371876
- Publication date Nov 26, 2020
- Micron Technology, Inc.
- Rahul Mitchell Jairaj
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICES CONFIGURED TO TEST DATA PATH INTEGRITY
- Publication number 20200227128
- Publication date Jul 16, 2020
- Micron Technology, Inc.
- Terry Grunzke
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS HAVING MEMORY ARRAYS AND HAVING TRIM REGISTERS ASSOCIATED...
- Publication number 20200051639
- Publication date Feb 13, 2020
- Micron Technology, Inc.
- Terry Grunzke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR AUTOMATED DYNAMIC WORD LINE START VOLTAGE
- Publication number 20190355422
- Publication date Nov 21, 2019
- Micron Technology, Inc.
- Dheeraj Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS TO CONTROL MEMORY OPERATIONS ON BUFFERS
- Publication number 20190332284
- Publication date Oct 31, 2019
- Micron Technology, Inc.
- Ali Mohammadzadeh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARTIALLY WRITTEN BLOCK TREATMENT
- Publication number 20190286328
- Publication date Sep 19, 2019
- Micron Technology, Inc.
- Sivagnanam Parthasarathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS OF ENTERING UNSELECTED MEMORIES INTO A DIFF...
- Publication number 20190212805
- Publication date Jul 11, 2019
- Micron Technology, Inc.
- Terry M. Grunzke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LINE TERMINATION METHODS
- Publication number 20190057029
- Publication date Feb 21, 2019
- Micron Technology, Inc.
- Terry Grunzke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS TO CONTROL MEMORY OPERATIONS ON BUFFERS
- Publication number 20180349029
- Publication date Dec 6, 2018
- Micron Technology, Inc.
- Ali Mohammadzadeh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR AUTOMATED DYNAMIC WORD LINE START VOLTAGE
- Publication number 20180301193
- Publication date Oct 18, 2018
- Micron Technology, Inc.
- Dheeraj Srinivasan
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS OF VERIFYING DATA PATH INTEGRITY
- Publication number 20180277233
- Publication date Sep 27, 2018
- Micron Technology, Inc.
- Terry Grunzke
- G11 - INFORMATION STORAGE
Information Patent Application
DEVICES, METHODS, AND SYSTEMS SUPPORTING ON UNIT TERMINATION
- Publication number 20180268883
- Publication date Sep 20, 2018
- Micron Technology, Inc.
- Terry M. Grunzke
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
APPARATUS HAVING MEMORY ARRAYS AND HAVING TRIM REGISTERS ASSOCIATED...
- Publication number 20180254086
- Publication date Sep 6, 2018
- Micron Technology, Inc.
- Terry Grunzke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARTIALLY WRITTEN BLOCK TREATMENT
- Publication number 20180210653
- Publication date Jul 26, 2018
- Micron Technology, Inc.
- Sivagnanam Parthasarathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMPEDANCE ADJUSTMENT IN A MEMORY DEVICE
- Publication number 20180032453
- Publication date Feb 1, 2018
- Micron Technology, Inc.
- Terry Grunzke
- G06 - COMPUTING CALCULATING COUNTING

Terry M. Grunzke

Person

Patents Grantslast 30 patents

Devices, systems, and methods for encoding and decoding codewords

Apparatus having selectively-activated termination circuitry

Read retry scratch space

Apparatuses and methods of entering unselected memories into a diff...

Read retry scratch space

Apparatuses and methods to control memory operations on buffers

Partially written block treatment

Memory devices having selectively-activated termination devices

Apparatuses and methods for automated dynamic word line start voltage

Memory devices configured to test data path integrity

At-risk memory location identification and management

Apparatuses and methods of entering unselected memories into a diff...

Apparatus having memory arrays and having trim registers associated...

Apparatuses and methods to control memory operations on buffers

Partially written block treatment

Line termination methods

Apparatuses and methods for automated dynamic word line start voltage

Methods of verifying data path integrity

Apparatus having memory arrays and having trim registers associated...

Partially written block treatment

Apparatuses and methods for automated dynamic word line start voltage

Apparatuses and methods to control memory operations on buffers

Partially written block treatment

Devices, methods, and systems supporting on unit termination

Apparatuses and methods of entering unselected memories into a diff...

Line termination methods

Impedance adjustment in a memory device

Data path integrity verification in memory devices

Apparatus for power management

Memory devices and their operation having trim registers associated...

Patents Applicationslast 30 patents

ERROR CORRECTION USING ON-DIE PARITY BIT STORAGE AND TRANSITIONAL S...

System and Method for Protecting Data Using Cyclic Properties of Er...

SELECTIVELY-ACTIVATED TERMINATION CIRCUITRY, AND ASSOCIATED SYSTEMS...

Low Complexity System and Method for Detection and Correction of Da...

System and Method for Protecting Data

DEVICES, SYSTEMS, AND METHODS FOR ENCODING AND DECODING CODEWORDS

READ RETRY SCRATCH SPACE

APPARATUS HAVING SELECTIVELY-ACTIVATED TERMINATION CIRCUITRY

APPARATUSES AND METHODS OF ENTERING UNSELECTED MEMORIES INTO A DIFF...

MITIGATING ROW-HAMMER ATTACKS

APPARATUSES AND METHODS TO CONTROL MEMORY OPERATIONS ON BUFFERS

AT-RISK MEMORY LOCATION IDENTIFICATION AND MANAGEMENT

MEMORY DEVICES HAVING SELECTIVELY-ACTIVATED TERMINATION DEVICES

PARTIALLY WRITTEN BLOCK TREATMENT

APPARATUSES AND METHODS FOR AUTOMATED DYNAMIC WORD LINE START VOLTAGE

READ RETRY SCRATCH SPAC

MEMORY DEVICES CONFIGURED TO TEST DATA PATH INTEGRITY

APPARATUS HAVING MEMORY ARRAYS AND HAVING TRIM REGISTERS ASSOCIATED...

APPARATUSES AND METHODS FOR AUTOMATED DYNAMIC WORD LINE START VOLTAGE

APPARATUSES AND METHODS TO CONTROL MEMORY OPERATIONS ON BUFFERS

PARTIALLY WRITTEN BLOCK TREATMENT

APPARATUSES AND METHODS OF ENTERING UNSELECTED MEMORIES INTO A DIFF...

LINE TERMINATION METHODS

APPARATUSES AND METHODS TO CONTROL MEMORY OPERATIONS ON BUFFERS

APPARATUSES AND METHODS FOR AUTOMATED DYNAMIC WORD LINE START VOLTAGE

METHODS OF VERIFYING DATA PATH INTEGRITY

DEVICES, METHODS, AND SYSTEMS SUPPORTING ON UNIT TERMINATION

APPARATUS HAVING MEMORY ARRAYS AND HAVING TRIM REGISTERS ASSOCIATED...

PARTIALLY WRITTEN BLOCK TREATMENT

IMPEDANCE ADJUSTMENT IN A MEMORY DEVICE