Teruyuki Mine

Person

Yokkaichi, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Three-dimensional resistive random access memory containing self-al...
- Patent number 10,096,654
- Issue date Oct 9, 2018
- SanDisk Technologies LLC
- Shin Kikuchi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating memory array having divided apart bit lines a...
- Patent number 9,887,240
- Issue date Feb 6, 2018
- SanDisk Technologies LLC
- Seiji Shimabukuro
- G11 - INFORMATION STORAGE
Information Patent Grant
Monolithic three dimensional memory arrays formed using sacrificial...
- Patent number 9,646,880
- Issue date May 9, 2017
- SanDisk Technologies LLC
- Seje Takaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of operating memory array having divided apart bit lines and...
- Patent number 9,608,043
- Issue date Mar 28, 2017
- SanDisk Technologies LLC
- Seiji Shimabukuro
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having unequal pitch vertical channel t...
- Patent number 9,595,568
- Issue date Mar 14, 2017
- SanDisk Technologies LLC
- Teruyuki Mine
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having unequal pitch vertical channel t...
- Patent number 9,391,120
- Issue date Jul 12, 2016
- SanDisk Technologies LLC
- Teruyuki Mine
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array having divided apart bit lines and partially divided b...
- Patent number 9,356,074
- Issue date May 31, 2016
- SanDisk Technologies Inc.
- Seiji Shimabukuro
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods of forming sidewall gates
- Patent number 9,177,964
- Issue date Nov 3, 2015
- Sandisk 3D LLC
- Akira Nakada
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
HIGH VOLTAGE FIELD EFFECT TRANSISTORS WITH METAL-INSULATOR-SEMICOND...
- Publication number 20220278209
- Publication date Sep 1, 2022
- SANDISK TECHNOLOGIES LLC
- Teruyuki MINE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL 1T FERROELECTRIC MEMORY CELLS, MEMORY ARRAYS AND METHODS O...
- Publication number 20190237470
- Publication date Aug 1, 2019
- SanDisk Technologies LLC
- Teruyuki Mine
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FABRICATING MEMORY ARRAY HAVING DIVIDED APART BIT LINES A...
- Publication number 20170154925
- Publication date Jun 1, 2017
- SanDisk Technologies LLC
- Seiji Shimabukuro
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-DIMENSIONAL RESISTIVE RANDOM ACCESS MEMORY CONTAINING SELF-AL...
- Publication number 20170077184
- Publication date Mar 16, 2017
- SanDisk 3D LLC
- Shin KIKUCHI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method Of Manufacturing Semiconductor Device And Semiconductor Devi...
- Publication number 20160284764
- Publication date Sep 29, 2016
- SanDisk Technologies LLC
- Teruyuki Mine
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD OF OPERATING MEMORY ARRAY HAVING DIVIDED APART BIT LINES AND...
- Publication number 20160268340
- Publication date Sep 15, 2016
- SanDisk Technologies LLC
- Seiji Shimabukuro
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY ARRAY HAVING DIVIDED APART BIT LINES AND PARTIALLY DIVIDED B...
- Publication number 20160141337
- Publication date May 19, 2016
- SanDisk 3D LLC
- Sejei Shimabukuro
- G11 - INFORMATION STORAGE
Information Patent Application
Method Of Manufacturing Semiconductor Device And Semiconductor Devi...
- Publication number 20160035789
- Publication date Feb 4, 2016
- SanDisk 3D LLC
- Teruyuki Mine
- G11 - INFORMATION STORAGE
Information Patent Application
Methods of Forming Sidewall Gates
- Publication number 20150162338
- Publication date Jun 11, 2015
- SanDisk 3D LLC
- Akira Nakada
- H01 - BASIC ELECTRIC ELEMENTS

Teruyuki Mine

Person

Patents Grantslast 30 patents

Three-dimensional resistive random access memory containing self-al...

Method of fabricating memory array having divided apart bit lines a...

Monolithic three dimensional memory arrays formed using sacrificial...

Method of operating memory array having divided apart bit lines and...

Semiconductor memory device having unequal pitch vertical channel t...

Semiconductor memory device having unequal pitch vertical channel t...

Memory array having divided apart bit lines and partially divided b...

Methods of forming sidewall gates

Patents Applicationslast 30 patents

HIGH VOLTAGE FIELD EFFECT TRANSISTORS WITH METAL-INSULATOR-SEMICOND...

VERTICAL 1T FERROELECTRIC MEMORY CELLS, MEMORY ARRAYS AND METHODS O...

METHOD OF FABRICATING MEMORY ARRAY HAVING DIVIDED APART BIT LINES A...

THREE-DIMENSIONAL RESISTIVE RANDOM ACCESS MEMORY CONTAINING SELF-AL...

Method Of Manufacturing Semiconductor Device And Semiconductor Devi...

METHOD OF OPERATING MEMORY ARRAY HAVING DIVIDED APART BIT LINES AND...

MEMORY ARRAY HAVING DIVIDED APART BIT LINES AND PARTIALLY DIVIDED B...

Method Of Manufacturing Semiconductor Device And Semiconductor Devi...

Methods of Forming Sidewall Gates