TREA

Tetsuya Iga

Follow

Person

  • Itami, JP
People

Patents Grantslast 30 patents

  • Information Patent Grant

    Phase-locked loop circuit
    • Patent number 5,581,214
    • Issue date Dec 3, 1996
    • Mitsubishi Denki Kabushiki Kaisha
    • Tetsuya Iga
    • H03 - BASIC ELECTRONIC CIRCUITRY
  • Information Patent Grant

    PLL circuit
    • Patent number 5,459,755
    • Issue date Oct 17, 1995
    • Mitsubishi Denki Kabushiki Kaisha
    • Tetsuya Iga
    • H03 - BASIC ELECTRONIC CIRCUITRY
  • Information Patent Grant

    Semiconductor integrated delay circuit
    • Patent number 5,448,195
    • Issue date Sep 5, 1995
    • Mitsubishi Denki Kabushiki Kaisha
    • Tetsuya Iga
    • H03 - BASIC ELECTRONIC CIRCUITRY
  • Information Patent Grant

    ECL circuit
    • Patent number 5,359,241
    • Issue date Oct 25, 1994
    • Mitsubishi Denki Kabushiki Kaisha
    • Koichi Hasegawa
    • H03 - BASIC ELECTRONIC CIRCUITRY