Theodore Zhu

Person

Mission Viejo, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Architecture for implementing an improved neural network
- Patent number 10,235,621
- Issue date Mar 19, 2019
- IOTELLIGENT TECHNOLOGY LTD INC
- Theodore Zhu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Spintronic devices with integrated transistors
- Patent number 8,503,224
- Issue date Aug 6, 2013
- Mircron Technology, Inc.
- Romney R. Katti
- G11 - INFORMATION STORAGE
Information Patent Grant
Spintronic devices with integrated transistors
- Patent number 8,164,948
- Issue date Apr 24, 2012
- Micron Technology, Inc.
- Romney R. Katti
- G11 - INFORMATION STORAGE
Information Patent Grant
Spintronic devices with integrated transistors
- Patent number 8,004,882
- Issue date Aug 23, 2011
- Micron Technology, Inc.
- Romney R. Katti
- G11 - INFORMATION STORAGE
Information Patent Grant
Passivated magneto-resistive bit structure and passivation method t...
- Patent number 7,427,514
- Issue date Sep 23, 2008
- Micron Technology, Inc.
- Harry Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory redundancy with programmable control
- Patent number 7,389,451
- Issue date Jun 17, 2008
- Micron Technology, Inc.
- Theodore Zhu
- G11 - INFORMATION STORAGE
Information Patent Grant
Spintronic devices with integrated transistors
- Patent number 7,339,818
- Issue date Mar 4, 2008
- Micron Technology, Inc.
- Romney R. Katti
- G11 - INFORMATION STORAGE
Information Patent Grant
Look-up table for use with redundant memory
- Patent number 7,328,379
- Issue date Feb 5, 2008
- Micron Technology, Inc.
- Theodore Zhu
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for forming magneto-resistive memory cells with shape anisot...
- Patent number 7,208,323
- Issue date Apr 24, 2007
- Micron Technology, Inc.
- Theodore Zhu
- G11 - INFORMATION STORAGE
Information Patent Grant
Magneto-resistive memory cell structures with improved selectivity
- Patent number 7,200,035
- Issue date Apr 3, 2007
- Micron Technology, Inc.
- Theodore Zhu
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods of forming magnetic shielding for a thin-film memory element
- Patent number 7,166,479
- Issue date Jan 23, 2007
- Micron Technology, Inc.
- Theodore Zhu
- G11 - INFORMATION STORAGE
Information Patent Grant
Pulsed write techniques for magneto-resistive memories
- Patent number 7,038,940
- Issue date May 2, 2006
- Micron Technology, Inc.
- Richard W. Swanson
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for manufacture of magneto-resistive bit structure
- Patent number 7,029,923
- Issue date Apr 18, 2006
- Micron Technology, Inc.
- Harry Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods of increasing write selectivity in an MRAM
- Patent number 6,992,918
- Issue date Jan 31, 2006
- Micron Technology, Inc.
- Shaoping Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory redundancy with programmable non-volatile control
- Patent number 6,968,482
- Issue date Nov 22, 2005
- Micron Technology, Inc.
- Theodore Zhu
- G11 - INFORMATION STORAGE
Information Patent Grant
Magneto-resistive memory cell structures with improved selectivity
- Patent number 6,920,064
- Issue date Jul 19, 2005
- Micron Technology, Inc.
- Theodore Zhu
- G11 - INFORMATION STORAGE
Information Patent Grant
Magneto-resistive memory cell with shape anistropy and memory devic...
- Patent number 6,906,950
- Issue date Jun 14, 2005
- Micron Technology, Inc.
- Theodore Zhu
- G11 - INFORMATION STORAGE
Information Patent Grant
Magnetoresistive random access memory (MRAM) cell patterning
- Patent number 6,887,719
- Issue date May 3, 2005
- Micron Technology, Inc.
- Yong Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thin film memory device having local and external magnetic shielding
- Patent number 6,872,993
- Issue date Mar 29, 2005
- Micron Technology, Inc.
- Theodore Zhu
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for manufacture of magneto-resistive bit structure
- Patent number 6,872,997
- Issue date Mar 29, 2005
- Micron Technology, Inc.
- Harry Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory redundancy with programmable non-volatile control
- Patent number 6,862,700
- Issue date Mar 1, 2005
- Micron Technology, Inc.
- Theodore Zhu
- G11 - INFORMATION STORAGE
Information Patent Grant
Pulsed write techniques for magneto-resistive memories
- Patent number 6,850,431
- Issue date Feb 1, 2005
- Micron Technology, Inc.
- Richard W. Swanson
- G11 - INFORMATION STORAGE
Information Patent Grant
Passivated magneto-resistive bit structure
- Patent number 6,806,546
- Issue date Oct 19, 2004
- Micron Technology, Inc.
- Harry Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods of increasing write selectivity in an MRAM
- Patent number 6,791,856
- Issue date Sep 14, 2004
- Micron Technology, Inc.
- Shaoping Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Magneto-resistive memory array
- Patent number 6,765,820
- Issue date Jul 20, 2004
- Micron Technology, Inc.
- Yong Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Magnetic memory cell with shape anisotropy
- Patent number 6,765,823
- Issue date Jul 20, 2004
- Micron Technology Incorporated
- Theodore Zhu
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods of increasing write selectivity in an MRAM
- Patent number 6,756,240
- Issue date Jun 29, 2004
- Micron Technology, Inc.
- Shaoping Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Magneto-resistive memory cell structures with improved selectivity
- Patent number 6,735,112
- Issue date May 11, 2004
- Micron Technology, Inc.
- Theodore Zhu
- G11 - INFORMATION STORAGE
Information Patent Grant
Pulsed write techniques for magneto-resistive memories
- Patent number 6,724,654
- Issue date Apr 20, 2004
- Micron Technology, Inc.
- Richard W. Swanson
- G11 - INFORMATION STORAGE
Information Patent Grant
Magneto-resistive bit structure and method of manufacture therefor
- Patent number 6,717,194
- Issue date Apr 6, 2004
- Micron Technology, Inc.
- Harry Liu
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
ARCHITECTURE FOR IMPLEMENTING AN IMPROVED NETWORK
- Publication number 20190213467
- Publication date Jul 11, 2019
- IOTELLIGENT TECHNOLOGY LTD INC
- Theodore ZHU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARCHITECTURE FOR IMPLEMENTING AN IMPROVED NEURAL NETWORK
- Publication number 20140337263
- Publication date Nov 13, 2014
- IOTELLIGENT TECHNOLOGY LTD INC
- Theodore ZHU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPINTRONIC DEVICES WITH INTEGRATED TRANSISTORS
- Publication number 20120201076
- Publication date Aug 9, 2012
- Micron Technology, Inc.
- Romney R. Katti
- G11 - INFORMATION STORAGE
Information Patent Application
SPINTRONIC DEVICES WITH INTEGRATED TRANSISTORS
- Publication number 20110280063
- Publication date Nov 17, 2011
- Micron Technology, Inc.
- Romney R. Katti
- G11 - INFORMATION STORAGE
Information Patent Application
SPINTRONIC DEVICES WITH INTEGRATED TRANSISTORS
- Publication number 20080151610
- Publication date Jun 26, 2008
- Micron Technology, Inc.
- Romney R. Katti
- G11 - INFORMATION STORAGE
Information Patent Application
MODIFIED PSEUDO-SPIN VALVE (PSV) FOR MEMORY APPLICATIONS
- Publication number 20070279971
- Publication date Dec 6, 2007
- Micron Technology, Inc.
- Timothy J. Vogt
- G11 - INFORMATION STORAGE
Information Patent Application
Spintronic devices with integrated transistors
- Publication number 20060083088
- Publication date Apr 20, 2006
- Romney R. Katti
- G11 - INFORMATION STORAGE
Information Patent Application
Methods of forming magnetic shielding for a thin-film memory element
- Publication number 20060063278
- Publication date Mar 23, 2006
- Micron Technology, Inc.
- Theodore Zhu
- G11 - INFORMATION STORAGE
Information Patent Application
Magneto-resistive memory cell structures with improved selectivity
- Publication number 20050226039
- Publication date Oct 13, 2005
- Theodore Zhu
- G11 - INFORMATION STORAGE
Information Patent Application
Magnetic memory cell with shape anisotropy
- Publication number 20050226040
- Publication date Oct 13, 2005
- Theodore Zhu
- G11 - INFORMATION STORAGE
Information Patent Application
Pulsed write techniques for magneto-resistive memories
- Publication number 20050185452
- Publication date Aug 25, 2005
- Richard W. Swanson
- G11 - INFORMATION STORAGE
Information Patent Application
Look-up table for use with redundant memory
- Publication number 20050141303
- Publication date Jun 30, 2005
- Theodore Zhu
- G11 - INFORMATION STORAGE
Information Patent Application
Memory redundancy with programmable control
- Publication number 20050141305
- Publication date Jun 30, 2005
- Theodore Zhu
- G11 - INFORMATION STORAGE
Information Patent Application
Memory redundancy with programmable non-volatile control
- Publication number 20050141304
- Publication date Jun 30, 2005
- Theodore Zhu
- G11 - INFORMATION STORAGE
Information Patent Application
Magnetic memory cell with shape anisotropy
- Publication number 20040240264
- Publication date Dec 2, 2004
- Theodore Zhu
- G11 - INFORMATION STORAGE
Information Patent Application
Passivated magneto-resistive bit structure
- Publication number 20040227244
- Publication date Nov 18, 2004
- Micron Technology, Inc.
- Harry Liu
- G11 - INFORMATION STORAGE
Information Patent Application
Magneto-resistive memory cell structures with improved selectivity
- Publication number 20040213055
- Publication date Oct 28, 2004
- Theodore Zhu
- G11 - INFORMATION STORAGE
Information Patent Application
Pulsed write techniques for magneto-resistive memories
- Publication number 20040184314
- Publication date Sep 23, 2004
- Micron Technology, Inc.
- Richard W. Swanson
- G11 - INFORMATION STORAGE
Information Patent Application
MAGNETORESISTIVE RANDOM ACCESS MEMORY (MRAM) CELL PATTERNING
- Publication number 20040185675
- Publication date Sep 23, 2004
- Micron Technology, Inc.
- Yong Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURE OF MAGNETO-RESISTIVE BIT STRUCTURE
- Publication number 20040155307
- Publication date Aug 12, 2004
- Harry Liu
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CELL STRUCTURES FOR LATCH MEMORY APPLICATION
- Publication number 20040145943
- Publication date Jul 29, 2004
- Theodore Zhu
- G11 - INFORMATION STORAGE
Information Patent Application
Memory redundancy with programmable non-volatile control
- Publication number 20040133826
- Publication date Jul 8, 2004
- Theodore Zhu
- G11 - INFORMATION STORAGE
Information Patent Application
Method for manufacture of magneto-resistive bit structure
- Publication number 20040126709
- Publication date Jul 1, 2004
- Harry Liu
- G11 - INFORMATION STORAGE
Information Patent Application
Passivated magneto-resistive bit structure and passivation method t...
- Publication number 20040091634
- Publication date May 13, 2004
- Micron Technology, Inc.
- Harry Liu
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS OF INCREASING WRITE SELECTIVITY IN AN MRAM
- Publication number 20040082082
- Publication date Apr 29, 2004
- Micron Technology, Inc.
- Shaoping Li
- G11 - INFORMATION STORAGE
Information Patent Application
Methods of increasing write selectivity in an MRAM
- Publication number 20040004878
- Publication date Jan 8, 2004
- Micron Technology, Inc.
- Shaoping Li
- G11 - INFORMATION STORAGE
Information Patent Application
Magneto-resistive memory cell structures with improved selectivity
- Publication number 20030147273
- Publication date Aug 7, 2003
- Theodore Zhu
- G11 - INFORMATION STORAGE
Information Patent Application
Magneto-resistive memory array
- Publication number 20030112657
- Publication date Jun 19, 2003
- Yong Lu
- G11 - INFORMATION STORAGE
Information Patent Application
Methods of increasing write selectivity in an MRAM
- Publication number 20030086321
- Publication date May 8, 2003
- Micron Technology, Inc.
- Shaoping Li
- G11 - INFORMATION STORAGE
Information Patent Application
Magneto-resistive bit structure and method of manufacture therefor
- Publication number 20030081462
- Publication date May 1, 2003
- Harry Liu
- G11 - INFORMATION STORAGE

Theodore Zhu

Person

Patents Grantslast 30 patents

Architecture for implementing an improved neural network

Spintronic devices with integrated transistors

Spintronic devices with integrated transistors

Spintronic devices with integrated transistors

Passivated magneto-resistive bit structure and passivation method t...

Memory redundancy with programmable control

Spintronic devices with integrated transistors

Look-up table for use with redundant memory

Method for forming magneto-resistive memory cells with shape anisot...

Magneto-resistive memory cell structures with improved selectivity

Methods of forming magnetic shielding for a thin-film memory element

Pulsed write techniques for magneto-resistive memories

Method for manufacture of magneto-resistive bit structure

Methods of increasing write selectivity in an MRAM

Memory redundancy with programmable non-volatile control

Magneto-resistive memory cell structures with improved selectivity

Magneto-resistive memory cell with shape anistropy and memory devic...

Magnetoresistive random access memory (MRAM) cell patterning

Thin film memory device having local and external magnetic shielding

Method for manufacture of magneto-resistive bit structure

Memory redundancy with programmable non-volatile control

Pulsed write techniques for magneto-resistive memories

Passivated magneto-resistive bit structure

Methods of increasing write selectivity in an MRAM

Magneto-resistive memory array

Magnetic memory cell with shape anisotropy

Methods of increasing write selectivity in an MRAM

Magneto-resistive memory cell structures with improved selectivity

Pulsed write techniques for magneto-resistive memories

Magneto-resistive bit structure and method of manufacture therefor

Patents Applicationslast 30 patents

ARCHITECTURE FOR IMPLEMENTING AN IMPROVED NETWORK

ARCHITECTURE FOR IMPLEMENTING AN IMPROVED NEURAL NETWORK

SPINTRONIC DEVICES WITH INTEGRATED TRANSISTORS

SPINTRONIC DEVICES WITH INTEGRATED TRANSISTORS

SPINTRONIC DEVICES WITH INTEGRATED TRANSISTORS

MODIFIED PSEUDO-SPIN VALVE (PSV) FOR MEMORY APPLICATIONS

Spintronic devices with integrated transistors

Methods of forming magnetic shielding for a thin-film memory element

Magneto-resistive memory cell structures with improved selectivity

Magnetic memory cell with shape anisotropy

Pulsed write techniques for magneto-resistive memories

Look-up table for use with redundant memory

Memory redundancy with programmable control

Memory redundancy with programmable non-volatile control

Magnetic memory cell with shape anisotropy

Passivated magneto-resistive bit structure

Magneto-resistive memory cell structures with improved selectivity

Pulsed write techniques for magneto-resistive memories

MAGNETORESISTIVE RANDOM ACCESS MEMORY (MRAM) CELL PATTERNING

METHOD FOR MANUFACTURE OF MAGNETO-RESISTIVE BIT STRUCTURE

MEMORY CELL STRUCTURES FOR LATCH MEMORY APPLICATION

Memory redundancy with programmable non-volatile control

Method for manufacture of magneto-resistive bit structure

Passivated magneto-resistive bit structure and passivation method t...

METHODS OF INCREASING WRITE SELECTIVITY IN AN MRAM

Methods of increasing write selectivity in an MRAM

Magneto-resistive memory cell structures with improved selectivity

Magneto-resistive memory array

Methods of increasing write selectivity in an MRAM

Magneto-resistive bit structure and method of manufacture therefor