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Thierry Canaud
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Munchen, DE
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last 30 patents
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Patent Grant
Test arrangement for testing semiconductor circuit chips
Patent number
7,088,122
Issue date
Aug 8, 2006
Infineon Technologies AG
Udo Hartmann
G11 - INFORMATION STORAGE
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last 30 patents
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Patent Application
Test arrangement for testing semiconductor circuit chips
Publication number
20050068055
Publication date
Mar 31, 2005
Udo Hartmann
G01 - MEASURING TESTING
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Patent Application
Integrated microcontroller module and method for checking the funct...
Publication number
20040052149
Publication date
Mar 18, 2004
Thomas Hanuschek
G11 - INFORMATION STORAGE