Thomas Andre

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Magnetoresistive stack/structure and methods therefor
- Patent number 12,167,702
- Issue date Dec 10, 2024
- EVERSPIN TECHNOLOGIES, INC.
- Sumio Ikegawa
Information Patent Grant
Methods of forming magnetoresistive devices and integrated circuits
- Patent number 12,075,630
- Issue date Aug 27, 2024
- EVERSPIN TECHNOLOGIES, INC.
- Kerry Joseph Nagel
- G11 - INFORMATION STORAGE
Information Patent Grant
In-plane spin orbit torque magnetoresistive stack/structure and met...
- Patent number 11,637,235
- Issue date Apr 25, 2023
- EVERSPIN TECHNOLOGIES, INC.
- Sumio Ikegawa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming magnetoresistive devices and integrated circuits
- Patent number 11,482,570
- Issue date Oct 25, 2022
- EVERSPIN TECHNOLOGIES, INC.
- Kerry Joseph Nagel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming magnetoresistive devices and integrated circuits
- Patent number 11,335,728
- Issue date May 17, 2022
- EVERSPIN TECHNOLOGIES, INC.
- Kerry Joseph Nagel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device with shared amplifier circuitry
- Patent number 11,176,974
- Issue date Nov 16, 2021
- Everspin Technologies Inc.
- Syed M. Alam
- G11 - INFORMATION STORAGE
Information Patent Grant
Shared spin-orbit-torque write line in a spin-orbit-torque MRAM
- Patent number 11,127,896
- Issue date Sep 21, 2021
- EVERSPIN TECHNOLOGIES, INC.
- Syed M. Alam
- G11 - INFORMATION STORAGE
Information Patent Grant
Magnetoresistive device design and process integration with surroun...
- Patent number 10,700,123
- Issue date Jun 30, 2020
- EVERSPIN TECHNOLOGIES, INC.
- Thomas Andre
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Feed forward bias system for MTJ voltage control
- Patent number 10,658,013
- Issue date May 19, 2020
- EVERSPIN TECHNOLOGIES, INC.
- Thomas Andre
- G11 - INFORMATION STORAGE
Information Patent Grant
Delayed write-back in memory
- Patent number 10,657,065
- Issue date May 19, 2020
- EVERSPIN TECHNOLOGIES, INC.
- Thomas S. Andre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Short detection and inversion
- Patent number 10,614,907
- Issue date Apr 7, 2020
- EVERSPIN TECHNOLOGIES, INC.
- Thomas Andre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
ECC word configuration for system-level ECC compatibility
- Patent number 10,608,671
- Issue date Mar 31, 2020
- EVERSPIN TECHNOLOGIES, INC.
- Syed M. Alam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit for wordline autobooting in memory and method therefor
- Patent number 10,573,365
- Issue date Feb 25, 2020
- EVERSPIN TECHNOLOGIES, INC.
- Thomas Andre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bitline control in differential magnetic memory
- Patent number 10,446,213
- Issue date Oct 15, 2019
- EVERSPIN TECHNOLOGIES, INC.
- Yaojun Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with shared amplifier circuitry
- Patent number 10,395,699
- Issue date Aug 27, 2019
- EVERSPIN TECHNOLOGIES, INC.
- Syed M. Alam
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual-edge trigger asynchronous clock generation and related methods
- Patent number 10,304,511
- Issue date May 28, 2019
- Everspin Technologies Inc.
- Syed M. Alam
- G11 - INFORMATION STORAGE
Information Patent Grant
Delayed write-back in memory
- Patent number 10,268,591
- Issue date Apr 23, 2019
- Everspin Technologies Inc.
- Thomas Andre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write verify programming of a memory device
- Patent number 10,269,405
- Issue date Apr 23, 2019
- EVERSPIN TECHNOLOGIES, INC.
- Thomas Andre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
ECC word configuration for system-level ECC compatibility
- Patent number 10,256,840
- Issue date Apr 9, 2019
- EVERSPIN TECHNOLOGIES, INC.
- Syed M. Alam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Short detection and inversion
- Patent number 10,199,122
- Issue date Feb 5, 2019
- EVERSPIN TECHNOLOGIES, INC.
- Thomas Andre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and devices for healing reset errors in a magnetic memory
- Patent number 10,146,601
- Issue date Dec 4, 2018
- EVERSPIN TECHNOLOGIES, INC.
- Jon Slaughter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Burst length defined page size
- Patent number 10,141,039
- Issue date Nov 27, 2018
- EVERSPIN TECHNOLOGIES, INC.
- Thomas Andre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device with page emulation mode
- Patent number 10,114,700
- Issue date Oct 30, 2018
- EVERSPIN TECHNOLOGIES, INC.
- Syed M. Alam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Nonvolatile logic and security circuits
- Patent number 10,109,333
- Issue date Oct 23, 2018
- EVERSPIN TECHNOLOGIES, INC.
- Thomas Andre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Magnetoresistive device design and process integration with surroun...
- Patent number 10,103,197
- Issue date Oct 16, 2018
- EVERSPIN TECHNOLOGIES, INC.
- Thomas Andre
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Word line auto-booting in a spin-torque magnetic memery having loca...
- Patent number 10,037,790
- Issue date Jul 31, 2018
- EVERSPIN TECHNOLOGIES, INC.
- Thomas Andre
- G11 - INFORMATION STORAGE
Information Patent Grant
Delayed write-back in memory
- Patent number 9,990,300
- Issue date Jun 5, 2018
- EVERSPIN TECHNOLOGIES, INC.
- Thomas Andre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-destructive write/read leveling
- Patent number 9,978,433
- Issue date May 22, 2018
- EVERSPIN TECHNOLOGIES, INC.
- Thomas Andre
- G11 - INFORMATION STORAGE
Information Patent Grant
Self-referenced read with offset current in a memory
- Patent number 9,972,373
- Issue date May 15, 2018
- EVERSPIN TECHNOLOGIES, INC.
- Thomas Andre
- G11 - INFORMATION STORAGE
Information Patent Grant
Selection circuit with autobooting for magnetic memory and methods...
- Patent number 9,911,481
- Issue date Mar 6, 2018
- EVERSPIN TECHNOLOGIES, INC.
- Syed M. Alam
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
IN-PLANE SPIN ORBIT TORQUE MAGNETORESISTIVE STACK/STRUCTURE AND MET...
- Publication number 20230309416
- Publication date Sep 28, 2023
- EVERSPIN TECHNOLOGIES, INC.
- Sumio IKEGAWA
Information Patent Application
METHODS OF FORMING MAGNETORESISTIVE DEVICES AND INTEGRATED CIRCUITS
- Publication number 20230100514
- Publication date Mar 30, 2023
- EVERSPIN TECHNOLOGIES, INC.
- Kerry Joseph NAGEL
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS OF FORMING MAGNETORESISTIVE DEVICES AND INTEGRATED CIRCUITS
- Publication number 20210118948
- Publication date Apr 22, 2021
- EVERSPIN TECHNOLOGIES, INC.
- Kerry Joseph NAGEL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING MAGNETORESISTIVE DEVICES AND INTEGRATED CIRCUITS
- Publication number 20200286950
- Publication date Sep 10, 2020
- EVERSPIN TECHNOLOGIES, INC.
- Kerry Joseph NAGEL
- G11 - INFORMATION STORAGE
Information Patent Application
MAGNETORESISTIVE STACK/STRUCTURE AND METHODS THEREFOR
- Publication number 20200235288
- Publication date Jul 23, 2020
- EVERSPIN TECHNOLOGIES, INC.
- Sumio IKEGAWA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SHARED SPIN-ORBIT-TORQUE WRITE LINE IN A SPIN-ORBIT-TORQUE MRAM
- Publication number 20200235289
- Publication date Jul 23, 2020
- EVERSPIN TECHNOLOGIES, INC.
- Syed M. ALAM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY DEVICE WITH SHARED AMPLIFIER CIRCUITRY
- Publication number 20190355398
- Publication date Nov 21, 2019
- EVERSPIN TECHNOLOGIES, INC.
- Syed M. ALAM
- G11 - INFORMATION STORAGE
Information Patent Application
CIRCUIT FOR WORDLINE AUTOBOOTING IN MEMORY AND METHOD THEREFOR
- Publication number 20190221247
- Publication date Jul 18, 2019
- EVERSPIN TECHNOLOGIES, INC.
- Thomas Andre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FEED FORWARD BIAS SYSTEM FOR MTJ VOLTAGE CONTROL
- Publication number 20190221242
- Publication date Jul 18, 2019
- EVERSPIN TECHNOLOGIES, INC.
- Thomas ANDRE
- G11 - INFORMATION STORAGE
Information Patent Application
DELAYED WRITE-BACK IN MEMORY
- Publication number 20190213136
- Publication date Jul 11, 2019
- EVERSPIN TECHNOLOGIES, INC.
- Thomas S. ANDRE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ECC WORD CONFIGURATION FOR SYSTEM-LEVEL ECC COMPATIBILITY
- Publication number 20190199375
- Publication date Jun 27, 2019
- EVERSPIN TECHNOLOGIES, INC.
- Syed M. Alam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WRITE VERIFY PROGRAMMING OF A MEMORY DEVICE
- Publication number 20190156878
- Publication date May 23, 2019
- EVERSPIN TECHNOLOGIES, INC.
- Thomas Andre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHORT DETECTION AND INVERSION
- Publication number 20190147971
- Publication date May 16, 2019
- EVERSPIN TECHNOLOGIES, INC.
- Thomas Andre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND DEVICES FOR HEALING RESET ERRORS IN A MAGNETIC MEMORY
- Publication number 20190087250
- Publication date Mar 21, 2019
- EVERSPIN TECHNOLOGIES, INC.
- Jon SLAUGHTER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BURST LENGTH DEFINED PAGE SIZE AND RELATED METHODS
- Publication number 20190088306
- Publication date Mar 21, 2019
- EVERSPIN TECHNOLOGIES, INC.
- Thomas ANDRE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MAGNETORESISTIVE DEVICE DESIGN AND PROCESS INTEGRATION WITH SURROUN...
- Publication number 20190043921
- Publication date Feb 7, 2019
- EVERSPIN TECHNOLOGIES, INC.
- Thomas ANDRE
- G11 - INFORMATION STORAGE
Information Patent Application
DELAYED WRITE-BACK IN MEMORY
- Publication number 20180267899
- Publication date Sep 20, 2018
- EVERSPIN TECHNOLOGIES, INC.
- Thomas Andre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHORT DETECTION AND INVERSION
- Publication number 20180122495
- Publication date May 3, 2018
- EVERSPIN TECHNOLOGIES INC.
- Thomas ANDRE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NONVOLATILE LOGIC AND SECURITY CIRCUITS
- Publication number 20170337959
- Publication date Nov 23, 2017
- EVERSPIN TECHNOLOGIES, INC.
- Thomas Andre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DELAYED WRITE-BACK IN MEMORY
- Publication number 20170315920
- Publication date Nov 2, 2017
- EVERSPIN TECHNOLOGIES, INC.
- Thomas Andre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELF-REFERENCED READ WITH OFFSET CURRENT IN A MEMORY
- Publication number 20170301384
- Publication date Oct 19, 2017
- EVERSPIN TECHNOLOGIES, INC.
- Thomas Andre
- G11 - INFORMATION STORAGE
Information Patent Application
WRITE VERIFY PROGRAMMING OF A MEMORY DEVICE
- Publication number 20170263300
- Publication date Sep 14, 2017
- EVERSPIN TECHNOLOGIES, INC.
- Thomas ANDRE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WORD LINE AUTO-BOOTING IN A SPIN-TORQUE MAGNETIC MEMORY HAVING LOCA...
- Publication number 20170178709
- Publication date Jun 22, 2017
- EVERSPIN TECHNOLOGIES, INC.
- Thomas Andre
- G11 - INFORMATION STORAGE
Information Patent Application
ECC WORD CONFIGURATION FOR SYSTEM-LEVEL ECC COMPATIBILITY
- Publication number 20170104498
- Publication date Apr 13, 2017
- Everspin Technologies, Inc.
- Syed M. Alam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUIT AND METHOD FOR CONTROLLING MRAM CELL BIAS VOLTAGES
- Publication number 20170092347
- Publication date Mar 30, 2017
- EVERSPIN TECHNOLOGIES, INC.
- Dietmar Gogl
- G11 - INFORMATION STORAGE
Information Patent Application
NON-DESTRUCTIVE WRITE/READ LEVELING
- Publication number 20170084323
- Publication date Mar 23, 2017
- EVERSPIN TECHNOLOGIES, INC.
- Thomas ANDRE
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH TIMING OVERLAP MODE
- Publication number 20170084324
- Publication date Mar 23, 2017
- EVERSPIN TECHNOLOGIES, INC.
- Thomas Andre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHORT DETECTION AND INVERSION
- Publication number 20170069397
- Publication date Mar 9, 2017
- Everspin Technologies, Inc.
- Thomas Andre
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH PAGE EMULATION MODE
- Publication number 20170060691
- Publication date Mar 2, 2017
- EVERSPIN TECHNOLOGIES, INC.
- Syed M. Alam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTROLLER AND METHOD FOR INTERLEAVING DRAM AND MRAM ACCESSES
- Publication number 20160350031
- Publication date Dec 1, 2016
- EVERSPIN TECHNOLOGIES, INC.
- Syed M. Alam
- G06 - COMPUTING CALCULATING COUNTING

Thomas Andre

Person

Patents Grantslast 30 patents

Magnetoresistive stack/structure and methods therefor

Methods of forming magnetoresistive devices and integrated circuits

In-plane spin orbit torque magnetoresistive stack/structure and met...

Methods of forming magnetoresistive devices and integrated circuits

Methods of forming magnetoresistive devices and integrated circuits

Memory device with shared amplifier circuitry

Shared spin-orbit-torque write line in a spin-orbit-torque MRAM

Magnetoresistive device design and process integration with surroun...

Feed forward bias system for MTJ voltage control

Delayed write-back in memory

Short detection and inversion

ECC word configuration for system-level ECC compatibility

Circuit for wordline autobooting in memory and method therefor

Bitline control in differential magnetic memory

Memory device with shared amplifier circuitry

Dual-edge trigger asynchronous clock generation and related methods

Delayed write-back in memory

Write verify programming of a memory device

ECC word configuration for system-level ECC compatibility

Short detection and inversion

Methods and devices for healing reset errors in a magnetic memory

Burst length defined page size

Memory device with page emulation mode

Nonvolatile logic and security circuits

Magnetoresistive device design and process integration with surroun...

Word line auto-booting in a spin-torque magnetic memery having loca...

Delayed write-back in memory

Non-destructive write/read leveling

Self-referenced read with offset current in a memory

Selection circuit with autobooting for magnetic memory and methods...

Patents Applicationslast 30 patents

IN-PLANE SPIN ORBIT TORQUE MAGNETORESISTIVE STACK/STRUCTURE AND MET...

METHODS OF FORMING MAGNETORESISTIVE DEVICES AND INTEGRATED CIRCUITS

METHODS OF FORMING MAGNETORESISTIVE DEVICES AND INTEGRATED CIRCUITS

METHODS OF FORMING MAGNETORESISTIVE DEVICES AND INTEGRATED CIRCUITS

MAGNETORESISTIVE STACK/STRUCTURE AND METHODS THEREFOR

SHARED SPIN-ORBIT-TORQUE WRITE LINE IN A SPIN-ORBIT-TORQUE MRAM

MEMORY DEVICE WITH SHARED AMPLIFIER CIRCUITRY

CIRCUIT FOR WORDLINE AUTOBOOTING IN MEMORY AND METHOD THEREFOR

FEED FORWARD BIAS SYSTEM FOR MTJ VOLTAGE CONTROL

DELAYED WRITE-BACK IN MEMORY

ECC WORD CONFIGURATION FOR SYSTEM-LEVEL ECC COMPATIBILITY

WRITE VERIFY PROGRAMMING OF A MEMORY DEVICE

SHORT DETECTION AND INVERSION

METHODS AND DEVICES FOR HEALING RESET ERRORS IN A MAGNETIC MEMORY

BURST LENGTH DEFINED PAGE SIZE AND RELATED METHODS

MAGNETORESISTIVE DEVICE DESIGN AND PROCESS INTEGRATION WITH SURROUN...

DELAYED WRITE-BACK IN MEMORY

SHORT DETECTION AND INVERSION

NONVOLATILE LOGIC AND SECURITY CIRCUITS

DELAYED WRITE-BACK IN MEMORY

SELF-REFERENCED READ WITH OFFSET CURRENT IN A MEMORY

WRITE VERIFY PROGRAMMING OF A MEMORY DEVICE

WORD LINE AUTO-BOOTING IN A SPIN-TORQUE MAGNETIC MEMORY HAVING LOCA...

ECC WORD CONFIGURATION FOR SYSTEM-LEVEL ECC COMPATIBILITY

CIRCUIT AND METHOD FOR CONTROLLING MRAM CELL BIAS VOLTAGES

NON-DESTRUCTIVE WRITE/READ LEVELING

MEMORY DEVICE WITH TIMING OVERLAP MODE

SHORT DETECTION AND INVERSION

MEMORY DEVICE WITH PAGE EMULATION MODE

MEMORY CONTROLLER AND METHOD FOR INTERLEAVING DRAM AND MRAM ACCESSES