Thomas Bryan

Person

San Diego, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Fully compensated complementary duty cycle correction circuits
- Patent number 10,615,785
- Issue date Apr 7, 2020
- QUALCOMM Incorporated
- Shih-Wei Chou
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Efficient test architecture for multi-die chips
- Patent number 10,429,441
- Issue date Oct 1, 2019
- QUALCOMM Incorporated
- Tapan Jyoti Chakraborty
- G01 - MEASURING TESTING
Information Patent Grant
Die-to-die interface configuration and methods of use thereof
- Patent number 10,424,921
- Issue date Sep 24, 2019
- QUALCOMM Incorporated
- Kenneth Dubowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Systems and methods for wafer-level loopback test
- Patent number 10,114,074
- Issue date Oct 30, 2018
- QUALCOMM Incorporated
- Alvin Leng Sun Loke
- G01 - MEASURING TESTING
Information Patent Grant
Delay line for one shot pre-emphasis
- Patent number 10,044,342
- Issue date Aug 7, 2018
- QUALCOMM Incorporated
- LuVerne Ray Peterson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Termination schemes for multi-rank memory bus architectures
- Patent number 9,984,011
- Issue date May 29, 2018
- QUALCOMM Incorporated
- Tin Tin Wee
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for wafer-level loopback test
- Patent number 9,977,078
- Issue date May 22, 2018
- QUALCOMM Incorporated
- Alvin Leng Sun Loke
- G01 - MEASURING TESTING
Information Patent Grant
Transmitter with feedback terminated preemphasis
- Patent number 9,859,888
- Issue date Jan 2, 2018
- QUALCOMM Incorporated
- Luverne Ray Peterson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable high-speed equalizer and related method
- Patent number 9,825,626
- Issue date Nov 21, 2017
- QUALCOMM Incorporated
- Mohammed Mizanur Rahman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable pad capacitance for supporting bidirectional signaling...
- Patent number 9,767,889
- Issue date Sep 19, 2017
- QUALCOMM Incorporated
- Scott Powers
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Systems and methods to provide charge sharing at a transmit buffer...
- Patent number 9,698,782
- Issue date Jul 4, 2017
- QUALCOMM Incorporated
- Luverne Ray Peterson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Systems and methods for clock distribution in a die-to-die interface
- Patent number 9,654,090
- Issue date May 16, 2017
- QUALCOMM Incorporated
- Thomas Clark Bryan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuits and methods providing high-speed data link with equalizer
- Patent number 9,614,703
- Issue date Apr 4, 2017
- QUALCOMM Incorporated
- Mohammed Mizanur Rahman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low power receiver with wide input voltage range
- Patent number 9,536,593
- Issue date Jan 3, 2017
- QUALCOMM Incorporated
- LuVerne Ray Peterson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Systems and methods for clock distribution in a die-to-die interface
- Patent number 9,350,339
- Issue date May 24, 2016
- QUALCOMM Incorporated
- Thomas Clark Bryan
- G11 - INFORMATION STORAGE
Information Patent Grant
Output driver circuit with auto-equalization based on drive strengt...
- Patent number 9,337,807
- Issue date May 10, 2016
- QUALCOMM Incorporated
- Timothy Mowry Hollis
- G11 - INFORMATION STORAGE
Information Patent Grant
Load isolation for pad signal monitoring
- Patent number 9,263,107
- Issue date Feb 16, 2016
- QUALCOMM Incorporated
- Mark Charles Wayland
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for transition-minimized data bus inversion
- Patent number 9,244,875
- Issue date Jan 26, 2016
- QUALCOMM Incorporated
- Alvin Leng Sun Loke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for providing data channels at a die-to-die int...
- Patent number 9,245,870
- Issue date Jan 26, 2016
- QUALCOMM Incorporated
- LuVerne Ray Peterson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Cascaded test chain for stuck-at fault verification
- Patent number 9,111,848
- Issue date Aug 18, 2015
- QUALCOMM Incorporated
- Kenneth Dubowski
- G01 - MEASURING TESTING
Information Patent Grant
Self-biased receiver
- Patent number 9,077,289
- Issue date Jul 7, 2015
- QUALCOMM Incorporated
- Yu Huang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High definition multi-media interface
- Patent number 7,746,969
- Issue date Jun 29, 2010
- Entropic Communications, Inc.
- Thomas Bryan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Serializer with programmable delay elements
- Patent number 7,197,053
- Issue date Mar 27, 2007
- Applied Micro Circuits Corporation
- Zhixiang Jason Liu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuit with voltage clamping for bias transistor to allow power su...
- Patent number 6,911,871
- Issue date Jun 28, 2005
- Applied Micro Circuits Corporation
- Wei Li
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dual voltage-controlled oscillator structure with powder-down feature
- Patent number 6,876,263
- Issue date Apr 5, 2005
- Applied Micro Circuits Corporation
- Wei Li
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Loop-back clock phase generator
- Patent number 6,794,918
- Issue date Sep 21, 2004
- Applied Micro Circuits Corporation
- Hongwen Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for maximizing an amplitude of an output signa...
- Patent number 6,720,818
- Issue date Apr 13, 2004
- Applied Micro Circuits Corporation
- Zhixiang Jason Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Wide-bandwidth differential signal amplifier
- Patent number 6,664,853
- Issue date Dec 16, 2003
- Applied Micro Circuits Corporation
- Runhua Sun
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable phase locked-loop filter architecture for a range sele...
- Patent number 6,630,860
- Issue date Oct 7, 2003
- Applied Micro Circuits Corporation
- Sudhaker Reddy Anumula
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Source follower for low voltage differential signaling
- Patent number 6,552,582
- Issue date Apr 22, 2003
- Applied Micro Circuits Corporation
- Thomas Clark Bryan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
EFFICIENT TEST ARCHITECTURE FOR MULTI-DIE CHIPS
- Publication number 20180340977
- Publication date Nov 29, 2018
- QUALCOMM Incorporated
- Tapan Jyoti Chakraborty
- G01 - MEASURING TESTING
Information Patent Application
SYSTEMS AND METHODS FOR WAFER-LEVEL LOOPBACK TEST
- Publication number 20180231608
- Publication date Aug 16, 2018
- QUALCOMM Incorporated
- Alvin Leng Sun Loke
- G01 - MEASURING TESTING
Information Patent Application
Die-to-Die Interface Configuration and Methods of Use Thereof
- Publication number 20180233907
- Publication date Aug 16, 2018
- QUALCOMM Incorporated
- Kenneth Dubowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DELAY LINE FOR ONE SHOT PRE-EMPHASIS
- Publication number 20170359053
- Publication date Dec 14, 2017
- QUALCOMM Incorporated
- LuVerne Ray Peterson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TRANSMITTER WITH FEEDBACK TERMINATED PREEMPHASIS
- Publication number 20170353185
- Publication date Dec 7, 2017
- QUALCOMM Incorporated
- LuVerne Ray Peterson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TERMINATION SCHEMES FOR MULTI-RANK MEMORY BUS ARCHITECTURES
- Publication number 20170351625
- Publication date Dec 7, 2017
- QUALCOMM Incorporated
- Tin Tin Wee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuits and Methods Providing High-Speed Data Link with Equalizer
- Publication number 20170134191
- Publication date May 11, 2017
- QUALCOMM Incorporated
- Mohammed Mizanur Rahman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEMS AND METHODS FOR CLOCK DISTRIBUTION IN A DIE-TO-DIE INTERFACE
- Publication number 20160308519
- Publication date Oct 20, 2016
- QUALCOMM Incorporated
- Thomas Clark Bryan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CIRCUITS AND METHODS PROVIDING HIGH-SPEED DATA LINK WITH EQUALIZER
- Publication number 20160294585
- Publication date Oct 6, 2016
- QUALCOMM Incorporated
- Mohammed Mizanur Rahman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PROGRAMMABLE HIGH-SPEED EQUALIZER AND RELATED METHOD
- Publication number 20160294383
- Publication date Oct 6, 2016
- Qualcomm, Incorporated.
- Mohammed Mizanur Rahman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DRIVER USING PULL-UP NMOS TRANSISTOR
- Publication number 20160285453
- Publication date Sep 29, 2016
- QUALCOMM Incorporated
- Stephen Clifford Thilenius
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
OUTPUT DRIVER CIRCUIT WITH AUTO-EQUALIZATION BASED ON DRIVE STRENGT...
- Publication number 20160094202
- Publication date Mar 31, 2016
- QUALCOMM Incorporated
- Timothy Mowry Hollis
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEMS AND METHODS FOR WAFER-LEVEL LOOPBACK TEST
- Publication number 20160025807
- Publication date Jan 28, 2016
- QUALCOMM Incorporated
- Alvin Leng Sun Loke
- G01 - MEASURING TESTING
Information Patent Application
SYSTEMS AND METHODS FOR CLOCK DISTRIBUTION IN A DIE-TO-DIE INTERFACE
- Publication number 20160020759
- Publication date Jan 21, 2016
- QUALCOMM Incorporated
- Thomas Clark Bryan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEMS AND METHODS FOR TRANSITION-MINIMIZED DATA BUS INVERSION
- Publication number 20160019179
- Publication date Jan 21, 2016
- QUALCOMM Incorporated
- Alvin Leng Sun Loke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELF-BIASED RECEIVER
- Publication number 20140368276
- Publication date Dec 18, 2014
- Yu HUANG
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
High definition multi-media interface
- Publication number 20070230640
- Publication date Oct 4, 2007
- Thomas Bryan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Thomas Bryan

Person

Patents Grantslast 30 patents

Fully compensated complementary duty cycle correction circuits

Efficient test architecture for multi-die chips

Die-to-die interface configuration and methods of use thereof

Systems and methods for wafer-level loopback test

Delay line for one shot pre-emphasis

Termination schemes for multi-rank memory bus architectures

Systems and methods for wafer-level loopback test

Transmitter with feedback terminated preemphasis

Programmable high-speed equalizer and related method

Programmable pad capacitance for supporting bidirectional signaling...

Systems and methods to provide charge sharing at a transmit buffer...

Systems and methods for clock distribution in a die-to-die interface

Circuits and methods providing high-speed data link with equalizer

Low power receiver with wide input voltage range

Systems and methods for clock distribution in a die-to-die interface

Output driver circuit with auto-equalization based on drive strengt...

Load isolation for pad signal monitoring

Systems and methods for transition-minimized data bus inversion

Systems and methods for providing data channels at a die-to-die int...

Cascaded test chain for stuck-at fault verification

Self-biased receiver

High definition multi-media interface

Serializer with programmable delay elements

Circuit with voltage clamping for bias transistor to allow power su...

Dual voltage-controlled oscillator structure with powder-down feature

Loop-back clock phase generator

Method and apparatus for maximizing an amplitude of an output signa...

Wide-bandwidth differential signal amplifier

Programmable phase locked-loop filter architecture for a range sele...

Source follower for low voltage differential signaling

Patents Applicationslast 30 patents

EFFICIENT TEST ARCHITECTURE FOR MULTI-DIE CHIPS

SYSTEMS AND METHODS FOR WAFER-LEVEL LOOPBACK TEST

Die-to-Die Interface Configuration and Methods of Use Thereof

DELAY LINE FOR ONE SHOT PRE-EMPHASIS

TRANSMITTER WITH FEEDBACK TERMINATED PREEMPHASIS

TERMINATION SCHEMES FOR MULTI-RANK MEMORY BUS ARCHITECTURES

Circuits and Methods Providing High-Speed Data Link with Equalizer

SYSTEMS AND METHODS FOR CLOCK DISTRIBUTION IN A DIE-TO-DIE INTERFACE

CIRCUITS AND METHODS PROVIDING HIGH-SPEED DATA LINK WITH EQUALIZER

PROGRAMMABLE HIGH-SPEED EQUALIZER AND RELATED METHOD

DRIVER USING PULL-UP NMOS TRANSISTOR

OUTPUT DRIVER CIRCUIT WITH AUTO-EQUALIZATION BASED ON DRIVE STRENGT...

SYSTEMS AND METHODS FOR WAFER-LEVEL LOOPBACK TEST

SYSTEMS AND METHODS FOR CLOCK DISTRIBUTION IN A DIE-TO-DIE INTERFACE

SYSTEMS AND METHODS FOR TRANSITION-MINIMIZED DATA BUS INVERSION

SELF-BIASED RECEIVER

High definition multi-media interface