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Thomas E. Obremski
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So. Burlington, VT, US
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Patents Grants
last 30 patents
Information
Patent Grant
Method for testing embedded DRAM arrays
Patent number
7,237,165
Issue date
Jun 26, 2007
International Business Machines Corporation
Laura S. Chadwick
G11 - INFORMATION STORAGE
Information
Patent Grant
Testing logic and embedded memory in parallel
Patent number
7,103,814
Issue date
Sep 5, 2006
International Business Machines Corporation
William R. Corbin
G11 - INFORMATION STORAGE
Information
Patent Grant
Method for testing embedded DRAM arrays
Patent number
7,073,100
Issue date
Jul 4, 2006
International Business Machines Corporation
Laura S. Chadwick
G11 - INFORMATION STORAGE
Information
Patent Grant
Programmable built-in self test (BIST) data generator for semicondu...
Patent number
6,452,848
Issue date
Sep 17, 2002
International Business Machines Corporation
Thomas E. Obremski
G11 - INFORMATION STORAGE
Information
Patent Grant
Method and apparatus for ram built-in self test (BIST) address gene...
Patent number
6,388,930
Issue date
May 14, 2002
International Business Machines Corporation
Thomas E. Obremski
G11 - INFORMATION STORAGE
Information
Patent Grant
Partitioned dynamic memory allowing substitution of a redundant cir...
Patent number
5,724,295
Issue date
Mar 3, 1998
International Business Machines Corporation
Mark Adam Beiley
G11 - INFORMATION STORAGE
Patents Applications
last 30 patents
Information
Patent Application
Method for testing embedded DRAM arrays
Publication number
20050088888
Publication date
Apr 28, 2005
Laura S. Chadwick
G11 - INFORMATION STORAGE
Information
Patent Application
Method for testing embedded DRAM arrays
Publication number
20040093539
Publication date
May 13, 2004
International Business Machines Corporation
Laura S. Chadwick
G11 - INFORMATION STORAGE
Information
Patent Application
Testing logic and embedded memory in parallel
Publication number
20040083412
Publication date
Apr 29, 2004
International Business Machines Corporation
William R. Corbin
G01 - MEASURING TESTING