Thomas Hughes

Person

San Francisco, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods and apparatus for transmitting signals with selective delay...
- Patent number 8,811,528
- Issue date Aug 19, 2014
- LSI Corporation
- Thomas Hughes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multiple memory standard physical layer macro function
- Patent number 7,969,799
- Issue date Jun 28, 2011
- LSI Corporation
- Derrick Sai-Tang Butt
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and systems for VT invariant DDR3 SDRAM write leveling
- Patent number 7,839,716
- Issue date Nov 23, 2010
- LSI Corporation
- Cheng-Gang Kong
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for asynchronous clock regeneration
- Patent number 7,818,528
- Issue date Oct 19, 2010
- LSI Corporation
- Thomas Hughes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for glitch-free delay updates of a standard cell-based progr...
- Patent number 7,605,628
- Issue date Oct 20, 2009
- LSI Corporation
- Terence J. Magee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for providing swap path voltage and temperature c...
- Patent number 7,571,396
- Issue date Aug 4, 2009
- LSI Logic Corporation
- Thomas Hughes
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for compensating for PVT variation effects on the...
- Patent number 7,454,303
- Issue date Nov 18, 2008
- LSI Logic Corporation
- Terence Magee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for providing programmable delay read data strobe...
- Patent number 7,405,984
- Issue date Jul 29, 2008
- LSI Corporation
- Thomas Hughes
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND APPARATUS FOR TRANSMITTING SIGNALS WITH SELECTIVE DELAY...
- Publication number 20120128097
- Publication date May 24, 2012
- Thomas Hughes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
APPARATUS AND SYSTEMS FOR VT INVARIANT DDR3 SDRAM WRITE LEVELING
- Publication number 20100157700
- Publication date Jun 24, 2010
- Cheng-Gang Kong
- G11 - INFORMATION STORAGE
Information Patent Application
Multiple memory standard physical layer macro function
- Publication number 20090091987
- Publication date Apr 9, 2009
- Derrick Sai-Tang Butt
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM FOR GLITCH-FREE DELAY UPDATES OF A STANDARD CELL-BASED PROGR...
- Publication number 20080278210
- Publication date Nov 13, 2008
- Terence J. Magee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
System and method for compensating for PVT variation effects on the...
- Publication number 20080150610
- Publication date Jun 26, 2008
- Terence Magee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for providing swap path voltage and temperature c...
- Publication number 20080068911
- Publication date Mar 20, 2008
- Thomas Hughes
- G11 - INFORMATION STORAGE
Information Patent Application
System and method for asynchronous clock regeneration
- Publication number 20080071966
- Publication date Mar 20, 2008
- Thomas Hughes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for providing programmable delay read data strobe...
- Publication number 20080068904
- Publication date Mar 20, 2008
- Thomas Hughes
- G11 - INFORMATION STORAGE

Thomas Hughes

Person

Patents Grantslast 30 patents

Methods and apparatus for transmitting signals with selective delay...

Multiple memory standard physical layer macro function

Apparatus and systems for VT invariant DDR3 SDRAM write leveling

System and method for asynchronous clock regeneration

System for glitch-free delay updates of a standard cell-based progr...

System and method for providing swap path voltage and temperature c...

System and method for compensating for PVT variation effects on the...

System and method for providing programmable delay read data strobe...

Patents Applicationslast 30 patents

METHODS AND APPARATUS FOR TRANSMITTING SIGNALS WITH SELECTIVE DELAY...

APPARATUS AND SYSTEMS FOR VT INVARIANT DDR3 SDRAM WRITE LEVELING

Multiple memory standard physical layer macro function

SYSTEM FOR GLITCH-FREE DELAY UPDATES OF A STANDARD CELL-BASED PROGR...

System and method for compensating for PVT variation effects on the...

System and method for providing swap path voltage and temperature c...

System and method for asynchronous clock regeneration

System and method for providing programmable delay read data strobe...