Thomas J. Holman

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Mechanism for adjacent-symbol error correction and detection
- Patent number 8,327,222
- Issue date Dec 4, 2012
- Intel Corporation
- James W. Alexander
- G11 - INFORMATION STORAGE
Information Patent Grant
Method, system, and apparatus for adjacent-symbol error correction...
- Patent number 8,127,213
- Issue date Feb 28, 2012
- Intel Corporation
- Thomas Holman
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for high reliability data storage and retrieva...
- Patent number 7,941,592
- Issue date May 10, 2011
- Randy M. Bonella
- G11 - INFORMATION STORAGE
Information Patent Grant
Mechanism for adjacent-symbol error correction and detection
- Patent number 7,509,560
- Issue date Mar 24, 2009
- Intel Corporation
- James W. Alexander
- G11 - INFORMATION STORAGE
Information Patent Grant
Method, system, and apparatus for adjacent-symbol error correction...
- Patent number 7,496,826
- Issue date Feb 24, 2009
- Intel Corporation
- Thomas J. Holman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory module having a memory controller to interface with a system...
- Patent number 7,240,145
- Issue date Jul 3, 2007
- Intel Corporation
- Thomas J. Holman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual-port buffer-to-memory interface
- Patent number 7,024,518
- Issue date Apr 4, 2006
- Intel Corporation
- John B. Halbert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system including a memory module having a memory module cont...
- Patent number 7,007,130
- Issue date Feb 28, 2006
- Intel Corporation
- Thomas J. Holman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory module controller for providing an interface between a syste...
- Patent number 6,970,968
- Issue date Nov 29, 2005
- Intel Corporation
- Thomas J. Holman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory module having a memory module controller controlling memory...
- Patent number 6,968,419
- Issue date Nov 22, 2005
- Intel Corporation
- Thomas J. Holman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tracking memory page state
- Patent number 6,910,109
- Issue date Jun 21, 2005
- Intel Corporation
- Thomas J. Holman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for detecting and correcting failures in a memory system
- Patent number 6,691,276
- Issue date Feb 10, 2004
- Intel Corporation
- Thomas J. Holman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory expansion channel for propagation of control and request pac...
- Patent number 6,633,947
- Issue date Oct 14, 2003
- Intel Corporation
- Thomas J. Holman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for detecting errors in data output from memor...
- Patent number 6,519,735
- Issue date Feb 11, 2003
- Intel Corporation
- Thomas J. Holman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for interfacing to a computer memory
- Patent number 6,453,393
- Issue date Sep 17, 2002
- Intel Corporation
- Thomas J. Holman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device and system including a low power interface
- Patent number 6,378,018
- Issue date Apr 23, 2002
- Intel Corporation
- Ely K. Tsern
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for refreshing subsets of memory devices in a...
- Patent number 6,345,009
- Issue date Feb 5, 2002
- Rambus Inc.
- Ely K. Tsern
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for bus timing compensation
- Patent number 6,226,757
- Issue date May 1, 2001
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correction and detection for faults on time multiplexed data...
- Patent number 6,219,817
- Issue date Apr 17, 2001
- Intel Corporation
- Thomas J. Holman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for refreshing subsets of memory devices in a...
- Patent number 6,178,130
- Issue date Jan 23, 2001
- Rambus Inc.
- Ely K. Tsern
- G11 - INFORMATION STORAGE
Information Patent Grant
Cluster controller for memory and data cache in a multiple cluster...
- Patent number 6,151,663
- Issue date Nov 21, 2000
- Intel Corporation
- Stephen Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for automatically scrubbing ECC errors in memo...
- Patent number 6,101,614
- Issue date Aug 8, 2000
- Intel Corporation
- Mark A. Gonzales
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance cost optimized memory with delayed memory writes
- Patent number 6,075,730
- Issue date Jun 13, 2000
- Rambus Incorporated
- Richard M. Barth
- G11 - INFORMATION STORAGE
Information Patent Grant
Bank state tracking method and device
- Patent number 6,003,111
- Issue date Dec 14, 1999
- Intel Corporation
- Thomas J. Holman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller for independently supporting Synchronous and Asyn...
- Patent number 5,893,136
- Issue date Apr 6, 1999
- Intel Corporation
- Patrick F. Stolt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for managing memory accesses in a multiple mul...
- Patent number 5,829,052
- Issue date Oct 27, 1998
- Intel Corporation
- Stephen Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller for independently supporting synchronous and asyn...
- Patent number 5,721,860
- Issue date Feb 24, 1998
- Intel Corporation
- Patrick F. Stolt
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Method and apparatus for high reliability data storage and retrieva...
- Publication number 20100042772
- Publication date Feb 18, 2010
- ADDMM, LLC
- Randy M. Bonella
- G11 - INFORMATION STORAGE
Information Patent Application
Mechanism for Adjacent-Symbol Error Correction and Detection
- Publication number 20090125786
- Publication date May 14, 2009
- James W. Alexander
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD, SYSTEM, AND APPARATUS FOR ADJACENT-SYMBOL ERROR CORRECTION...
- Publication number 20080104476
- Publication date May 1, 2008
- Intel Corporation
- Thomas J. Holman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory system anti-aliasing scheme
- Publication number 20070089032
- Publication date Apr 19, 2007
- Intel Corporation
- James W. Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, system, and apparatus for adjacent-symbol error correction...
- Publication number 20070061675
- Publication date Mar 15, 2007
- Thomas J. Holman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, system, and apparatus for adjacent-symbol error correction...
- Publication number 20070061685
- Publication date Mar 15, 2007
- Thomas J. Holman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory system including a memory module having a memory module cont...
- Publication number 20060149857
- Publication date Jul 6, 2006
- Thomas J. Holman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mechanism for adjacent-symbol error correction and detection
- Publication number 20050154943
- Publication date Jul 14, 2005
- James W. Alexander
- G11 - INFORMATION STORAGE
Information Patent Application
Method, system, and apparatus for adjacent-symbol error correction...
- Publication number 20050022091
- Publication date Jan 27, 2005
- Thomas J. Holman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRACKING MEMORY PAGE STATE
- Publication number 20030191913
- Publication date Oct 9, 2003
- THOMAS J. HOLMAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for detecting and correcting failures in a memory system
- Publication number 20020199150
- Publication date Dec 26, 2002
- Thomas J. Holman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for propagating error status over an ECC prote...
- Publication number 20020138803
- Publication date Sep 26, 2002
- Thomas J. Holman
- G11 - INFORMATION STORAGE
Information Patent Application
Dual-port buffer-to-memory interface
- Publication number 20020112119
- Publication date Aug 15, 2002
- Intel Corporation
- John B. Halbert
- G06 - COMPUTING CALCULATING COUNTING

Thomas J. Holman

Person

Patents Grantslast 30 patents

Mechanism for adjacent-symbol error correction and detection

Method, system, and apparatus for adjacent-symbol error correction...

Method and apparatus for high reliability data storage and retrieva...

Mechanism for adjacent-symbol error correction and detection

Method, system, and apparatus for adjacent-symbol error correction...

Memory module having a memory controller to interface with a system...

Dual-port buffer-to-memory interface

Memory system including a memory module having a memory module cont...

Memory module controller for providing an interface between a syste...

Memory module having a memory module controller controlling memory...

Tracking memory page state

Method for detecting and correcting failures in a memory system

Memory expansion channel for propagation of control and request pac...

Method and apparatus for detecting errors in data output from memor...

Method and apparatus for interfacing to a computer memory

Memory device and system including a low power interface

Apparatus and method for refreshing subsets of memory devices in a...

Apparatus and method for bus timing compensation

Error correction and detection for faults on time multiplexed data...

Apparatus and method for refreshing subsets of memory devices in a...

Cluster controller for memory and data cache in a multiple cluster...

Method and apparatus for automatically scrubbing ECC errors in memo...

High performance cost optimized memory with delayed memory writes

Bank state tracking method and device

Memory controller for independently supporting Synchronous and Asyn...

Method and apparatus for managing memory accesses in a multiple mul...

Memory controller for independently supporting synchronous and asyn...

Patents Applicationslast 30 patents

Method and apparatus for high reliability data storage and retrieva...

Mechanism for Adjacent-Symbol Error Correction and Detection

METHOD, SYSTEM, AND APPARATUS FOR ADJACENT-SYMBOL ERROR CORRECTION...

Memory system anti-aliasing scheme

Method, system, and apparatus for adjacent-symbol error correction...

Method, system, and apparatus for adjacent-symbol error correction...

Memory system including a memory module having a memory module cont...

Mechanism for adjacent-symbol error correction and detection

Method, system, and apparatus for adjacent-symbol error correction...

TRACKING MEMORY PAGE STATE

Method for detecting and correcting failures in a memory system

Method and apparatus for propagating error status over an ECC prote...

Dual-port buffer-to-memory interface