Thomas J. Meany

Person

Bruff, IE

People

Patents Grantslast 30 patents

Information Patent Grant
Automatic power saving system and method for power interuptions
- Patent number 8,595,532
- Issue date Nov 26, 2013
- Analog Devices, Inc.
- Paul P. Wright
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Circuit die to circuit die interface system
- Patent number 7,893,717
- Issue date Feb 22, 2011
- Analog Devices, Inc.
- Thomas Meany
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Input biasing system for bracketing a floating power supply about a...
- Patent number 7,583,130
- Issue date Sep 1, 2009
- Analog Devices, Inc.
- Thomas J. Meany
- G11 - INFORMATION STORAGE
Information Patent Grant
Interface error monitor system and method
- Patent number 7,484,148
- Issue date Jan 27, 2009
- Analog Devices, Inc.
- Thomas J. Meany
- G01 - MEASURING TESTING
Information Patent Grant
Reduced chop rate analog to digital converter system and method
- Patent number 7,098,823
- Issue date Aug 29, 2006
- Analog Devices, Inc.
- John O'Dowd
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
MULTI-CHANNEL ANALOG TO DIGITAL CONVERTER WHICH FACILITATES CALIBRA...
- Patent number 6,924,755
- Issue date Aug 2, 2005
- Analog Devices, Inc.
- Andreas Callanan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit for testing an integrated circuit
- Patent number 6,498,507
- Issue date Dec 24, 2002
- Analog Devices, Inc.
- Thomas Meany
- G01 - MEASURING TESTING
Information Patent Grant
Clock oscillator
- Patent number 5,696,469
- Issue date Dec 9, 1997
- Analog Devices, Inc.
- Thomas J. Meany
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Input biasing system for bracketing a floating power supply about a...
- Publication number 20060087364
- Publication date Apr 27, 2006
- Thomas J. Meany
- G11 - INFORMATION STORAGE
Information Patent Application
Reduced chop rate analog to digital converter system and method
- Publication number 20050156769
- Publication date Jul 21, 2005
- John O'Dowd
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Interface error monitor system and method
- Publication number 20040117702
- Publication date Jun 17, 2004
- Thomas J. Meany
- G01 - MEASURING TESTING

Thomas J. Meany

Person

Patents Grantslast 30 patents

Automatic power saving system and method for power interuptions

Circuit die to circuit die interface system

Input biasing system for bracketing a floating power supply about a...

Interface error monitor system and method

Reduced chop rate analog to digital converter system and method

MULTI-CHANNEL ANALOG TO DIGITAL CONVERTER WHICH FACILITATES CALIBRA...

Circuit for testing an integrated circuit

Clock oscillator

Patents Applicationslast 30 patents

Input biasing system for bracketing a floating power supply about a...

Reduced chop rate analog to digital converter system and method

Interface error monitor system and method