Thomas J. Riordan

Person

Atherton, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatus, method and system for providing AC line power to lightin...
- Patent number 8,410,717
- Issue date Apr 2, 2013
- Point Somee Limited Liability Company
- Anatoly Shteynberg
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Apparatus, method and system for providing AC line power to lightin...
- Patent number 8,324,840
- Issue date Dec 4, 2012
- Point Somee Limited Liability Company
- Anatoly Shteynberg
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Cache memory architecture with system controller device that compar...
- Patent number 7,243,192
- Issue date Jul 10, 2007
- PMC-Sierra, Inc.
- Michael DeMar Taylor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache memory architecture and associated microprocessor design
- Patent number 7,130,968
- Issue date Oct 31, 2006
- PMC-Sierra, Inc.
- Michael DeMar Taylor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor chip for using an external clock to generate an internal...
- Patent number 5,978,926
- Issue date Nov 2, 1999
- MIPS Technologies, Inc.
- Paul S. Ries
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor with an efficient translation lookaside buffer which uses...
- Patent number 5,953,748
- Issue date Sep 14, 1999
- Wuantum Effect Design, Inc.
- Thomas J. Riordan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor chip having on-chip circuitry for generating a programmab...
- Patent number 5,734,877
- Issue date Mar 31, 1998
- Silicon Graphics, Inc.
- Paul S. Ries
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Structure and method for virtual-to-physical address translation in...
- Patent number 5,606,683
- Issue date Feb 25, 1997
- Quantum Effect Design, Inc.
- Thomas J. Riordan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for retarting pipeline processing
- Patent number 5,590,294
- Issue date Dec 31, 1996
- Silicon Graphics, Inc.
- Sunil Mirapuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Backward-compatible computer architecture with extended word size a...
- Patent number 5,568,630
- Issue date Oct 22, 1996
- Silicon Graphics, Inc.
- Earl A. Killian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Backward-compatible computer architecture with extended word size a...
- Patent number 5,420,992
- Issue date May 30, 1995
- Silicon Graphics, Inc.
- Earl A. Killian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock distribution system for an integrated circuit device
- Patent number 5,317,601
- Issue date May 31, 1994
- Silicon Graphics
- Thomas J. Riordan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable page size per entry translation look-aside buffer
- Patent number 5,263,140
- Issue date Nov 16, 1993
- Silicon Graphics, Inc.
- Thomas J. Riordan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor controlled interface with instruction streaming
- Patent number 5,027,270
- Issue date Jun 25, 1991
- MIPS Computer Systems, Inc.
- Thomas J. Riordan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual byte order computer architecture a functional unit for handlin...
- Patent number 4,959,779
- Issue date Sep 25, 1990
- MIPS Computer Systems, Inc.
- Larry B. Weber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
RISC computer with unaligned reference handling and method for the...
- Patent number 4,814,976
- Issue date Mar 21, 1989
- MIPS Computer Systems, Inc.
- Craig C. Hansen
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Apparatus, Method and System for Providing AC Line Power to Lightin...
- Publication number 20100308738
- Publication date Dec 9, 2010
- Exclara Inc.
- Anatoly Shteynberg
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Apparatus, Method and System for Providing AC Line Power to Lightin...
- Publication number 20100308739
- Publication date Dec 9, 2010
- Exclara Inc.
- Anatoly Shteynberg
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
CACHE MEMORY ARCHITECTURE AND ASSOCIATED MICROPROCESSOR AND SYSTEM...
- Publication number 20060236020
- Publication date Oct 19, 2006
- Michael DeMar Taylor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cache memory architecture and associated microprocessor design
- Publication number 20040181634
- Publication date Sep 16, 2004
- Michael DeMar Taylor
- G06 - COMPUTING CALCULATING COUNTING

Thomas J. Riordan

Person

Patents Grantslast 30 patents

Apparatus, method and system for providing AC line power to lightin...

Apparatus, method and system for providing AC line power to lightin...

Cache memory architecture with system controller device that compar...

Cache memory architecture and associated microprocessor design

Processor chip for using an external clock to generate an internal...

Processor with an efficient translation lookaside buffer which uses...

Processor chip having on-chip circuitry for generating a programmab...

Structure and method for virtual-to-physical address translation in...

Method and apparatus for retarting pipeline processing

Backward-compatible computer architecture with extended word size a...

Backward-compatible computer architecture with extended word size a...

Clock distribution system for an integrated circuit device

Variable page size per entry translation look-aside buffer

Processor controlled interface with instruction streaming

Dual byte order computer architecture a functional unit for handlin...

RISC computer with unaligned reference handling and method for the...

Patents Applicationslast 30 patents

Apparatus, Method and System for Providing AC Line Power to Lightin...

Apparatus, Method and System for Providing AC Line Power to Lightin...

CACHE MEMORY ARCHITECTURE AND ASSOCIATED MICROPROCESSOR AND SYSTEM...

Cache memory architecture and associated microprocessor design