Thomas Jew

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory reads of weight values
- Patent number 10,825,512
- Issue date Nov 3, 2020
- NXP USA, INC.
- Frank Kelsey Baker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Full address coverage during memory array built-in self-test with m...
- Patent number 10,007,588
- Issue date Jun 26, 2018
- NXP USA, INC.
- Botang Shao
- G11 - INFORMATION STORAGE
Information Patent Grant
Capacitive sensing and reference voltage scheme for random access m...
- Patent number 9,767,875
- Issue date Sep 19, 2017
- NXP USA, INC.
- Anirban Roy
- G11 - INFORMATION STORAGE
Information Patent Grant
Full address coverage during memory array built-in self test with m...
- Patent number 9,651,617
- Issue date May 16, 2017
- NXP USA, INC.
- Edward Bryann C. Fernandez
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile random access memory (NVRAM)
- Patent number 9,558,800
- Issue date Jan 31, 2017
- NXP USA, INC.
- Anirban Roy
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory (NVM) with endurance control
- Patent number 9,508,397
- Issue date Nov 29, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Richard K. Eguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile random access memory (NVRAM)
- Patent number 9,349,426
- Issue date May 24, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Anirban Roy
- G11 - INFORMATION STORAGE
Information Patent Grant
Flash memory express erase and program
- Patent number 9,214,045
- Issue date Dec 15, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Timothy J. Strauss
- G11 - INFORMATION STORAGE
Information Patent Grant
Threshold voltage techniques for detecting an imminent read failure...
- Patent number 8,504,884
- Issue date Aug 6, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Richard K. Eguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Time-based techniques for detecting an imminent read failure in a m...
- Patent number 8,095,836
- Issue date Jan 10, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Richard K. Eguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Electronic device including a nonvolatile memory array and methods...
- Patent number 7,668,018
- Issue date Feb 23, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Ronald J. Syzdek
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic voltage adjustment for memory
- Patent number 7,616,509
- Issue date Nov 10, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Qadeer A. Qureshi
- G11 - INFORMATION STORAGE
Information Patent Grant
In-circuit Vt distribution bit counter for non-volatile memory devices
- Patent number 7,599,236
- Issue date Oct 6, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Richard K. Eguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for adjusting an operating parameter of an int...
- Patent number 7,483,327
- Issue date Jan 27, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Qadeer A. Qureshi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Concurrent programming and program verification of floating gate tr...
- Patent number 7,428,172
- Issue date Sep 23, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Jon S. Choy
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory access with consecutive addresses corresponding to different...
- Patent number 7,269,090
- Issue date Sep 11, 2007
- FREESCALE SEMICONDUCTOR, INC.
- Frank K. Baker, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Nonvolatile memory system using magneto-resistive random access mem...
- Patent number 7,245,527
- Issue date Jul 17, 2007
- FREESCALE SEMICONDUCTOR, INC.
- Qadeer A. Qureshi
- G11 - INFORMATION STORAGE
Information Patent Grant
In-circuit memory array bit cell threshold voltage distribution mea...
- Patent number 6,226,200
- Issue date May 1, 2001
- Motorola Inc.
- Richard Kazuki Eguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device memory cell and method for selectively erasing...
- Patent number 6,101,130
- Issue date Aug 8, 2000
- Motorola Inc.
- Frank Kelsey Baker
- G11 - INFORMATION STORAGE
Information Patent Grant
Voltage recovery circuit and method therefor
- Patent number 6,008,677
- Issue date Dec 28, 1999
- Motorola, Inc.
- Cheri Lynn Harrington
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory with over-program protection and method therefor
- Patent number 5,991,201
- Issue date Nov 23, 1999
- Motorola Inc.
- Clinton C. K. Kuo
- G11 - INFORMATION STORAGE
Information Patent Grant
Data processing system having a memory with both a high speed opera...
- Patent number 5,737,566
- Issue date Apr 7, 1998
- Motorola, Inc.
- Robert Wayne Sparks
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
FULL ADDRESS COVERAGE DURING MEMORY ARRAY BUILT-IN SELF-TEST WITH M...
- Publication number 20170213601
- Publication date Jul 27, 2017
- FREESCALE SEMICONDUCTOR, INC.
- Botang SHAO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FULL ADDRESS COVERAGE DURING MEMORY ARRAY BUILT-IN SELF TEST WITH M...
- Publication number 20170092380
- Publication date Mar 30, 2017
- FREESCALE SEMICONDUCTOR, INC.
- EDWARD BRYANN C. FERNANDEZ
- G11 - INFORMATION STORAGE
Information Patent Application
SENSING AND REFERENCE VOLTAGE SCHEME FOR RANDOM ACCESS MEMORY
- Publication number 20170047101
- Publication date Feb 16, 2017
- FREESCALE SEMICONDUCTOR, INC.
- ANIRBAN ROY
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE RANDOM ACCESS MEMORY (NVRAM)
- Publication number 20170004867
- Publication date Jan 5, 2017
- FREESCALE SEMICONDUCTOR, INC.
- ANIRBAN ROY
- G11 - INFORMATION STORAGE
Information Patent Application
SECURE FIRMWARE FLASH CONTROLLER
- Publication number 20150067314
- Publication date Mar 5, 2015
- Timothy J. Strauss
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THRESHOLD VOLTAGE TECHNIQUES FOR DETECTING AN IMMINENT READ FAILURE...
- Publication number 20110107161
- Publication date May 5, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Richard Eguchi
- G11 - INFORMATION STORAGE
Information Patent Application
TIME-BASED TECHNIQUES FOR DETECTING AN IMMINENT READ FAILURE IN A M...
- Publication number 20110107160
- Publication date May 5, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Richard Eguchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC VOLTAGE ADJUSTMENT FOR MEMORY
- Publication number 20090016140
- Publication date Jan 15, 2009
- Qadeer A. Qureshi
- G11 - INFORMATION STORAGE
Information Patent Application
ELECTRONIC DEVICE INCLUDING A NONVOLATILE MEMORY ARRAY AND METHODS...
- Publication number 20080247255
- Publication date Oct 9, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Ronald J. Syzdek
- G11 - INFORMATION STORAGE
Information Patent Application
Concurrent programming and program verification of floating gate tr...
- Publication number 20080013384
- Publication date Jan 17, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Jon S. Choy
- G11 - INFORMATION STORAGE
Information Patent Application
In-circuit Vt distribution bit counter for non-volatile memory devices
- Publication number 20070285986
- Publication date Dec 13, 2007
- Richard K. Eguchi
- G11 - INFORMATION STORAGE
Information Patent Application
Apparatus and method for adjusting an operating parameter of an int...
- Publication number 20070220388
- Publication date Sep 20, 2007
- Qadeer A. Quereshi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Nonvolatile memory system using magneto-resistive random access mem...
- Publication number 20060256610
- Publication date Nov 16, 2006
- FREESCALE SEMICONDUCTOR, INC.
- Qadeer A. Qureshi
- G11 - INFORMATION STORAGE
Information Patent Application
Memory system and method of accessing thereof
- Publication number 20020103959
- Publication date Aug 1, 2002
- Frank K. Baker
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Memory reads of weight values

Full address coverage during memory array built-in self-test with m...

Capacitive sensing and reference voltage scheme for random access m...

Full address coverage during memory array built-in self test with m...

Non-volatile random access memory (NVRAM)

Non-volatile memory (NVM) with endurance control

Non-volatile random access memory (NVRAM)

Flash memory express erase and program

Threshold voltage techniques for detecting an imminent read failure...

Time-based techniques for detecting an imminent read failure in a m...

Electronic device including a nonvolatile memory array and methods...

Dynamic voltage adjustment for memory

In-circuit Vt distribution bit counter for non-volatile memory devices

Apparatus and method for adjusting an operating parameter of an int...

Concurrent programming and program verification of floating gate tr...

Memory access with consecutive addresses corresponding to different...

Nonvolatile memory system using magneto-resistive random access mem...

In-circuit memory array bit cell threshold voltage distribution mea...

Semiconductor device memory cell and method for selectively erasing...

Voltage recovery circuit and method therefor

Non-volatile memory with over-program protection and method therefor

Data processing system having a memory with both a high speed opera...

Patents Applicationslast 30 patents

FULL ADDRESS COVERAGE DURING MEMORY ARRAY BUILT-IN SELF-TEST WITH M...

FULL ADDRESS COVERAGE DURING MEMORY ARRAY BUILT-IN SELF TEST WITH M...

SENSING AND REFERENCE VOLTAGE SCHEME FOR RANDOM ACCESS MEMORY

NON-VOLATILE RANDOM ACCESS MEMORY (NVRAM)

SECURE FIRMWARE FLASH CONTROLLER

THRESHOLD VOLTAGE TECHNIQUES FOR DETECTING AN IMMINENT READ FAILURE...

TIME-BASED TECHNIQUES FOR DETECTING AN IMMINENT READ FAILURE IN A M...

DYNAMIC VOLTAGE ADJUSTMENT FOR MEMORY

ELECTRONIC DEVICE INCLUDING A NONVOLATILE MEMORY ARRAY AND METHODS...

Concurrent programming and program verification of floating gate tr...

In-circuit Vt distribution bit counter for non-volatile memory devices

Apparatus and method for adjusting an operating parameter of an int...

Nonvolatile memory system using magneto-resistive random access mem...

Memory system and method of accessing thereof