Thomas Ludwig

Person

Sendelfingen, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Dense chevron finFET and method of manufacturing same
- Patent number 8,963,294
- Issue date Feb 24, 2015
- International Business Machines Corporation
- Jochen Beintner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit macro placement using macro aspect ratio based on ports
- Patent number 8,762,919
- Issue date Jun 24, 2014
- International Business Machines Corporation
- Joachim Keinert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shaping ports in integrated circuit design
- Patent number 8,495,551
- Issue date Jul 23, 2013
- International Business Machines Corporation
- Joachim Keinert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, electronic design automation tool, computer program product...
- Patent number 8,429,584
- Issue date Apr 23, 2013
- International Business Machines Corporation
- Joachim Keinert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Gridded glyph geometric objects (L3GO) design method
- Patent number 8,423,947
- Issue date Apr 16, 2013
- International Business Machines Corporation
- Mark A. Lavin
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Using port obscurity factors to improve routing
- Patent number 8,418,110
- Issue date Apr 9, 2013
- International Business Machines Corporation
- Joachim Keinert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Layout quality gauge for integrated circuit design
- Patent number 8,020,120
- Issue date Sep 13, 2011
- International Business Machines Corporation
- Fook-Luen Heng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Measurement arrangement for determining the characteristic line par...
- Patent number 7,990,158
- Issue date Aug 2, 2011
- International Business Machines Corporation
- Thomas Ludwig
- G01 - MEASURING TESTING
Information Patent Grant
Port assignment in hierarchical designs by abstracting macro logic
- Patent number 7,962,877
- Issue date Jun 14, 2011
- International Business Machines Corporation
- Joachim Keinert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Field effect transistor with raised source/drain fin straps
- Patent number 7,851,283
- Issue date Dec 14, 2010
- International Business Machines Corporation
- Brent A. Anderson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Field effect transistor with raised source/drain fin straps
- Patent number 7,456,471
- Issue date Nov 25, 2008
- International Business Machines Corporation
- Brent A. Anderson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dense chevron finFET and method of manufacturing same
- Patent number 7,323,374
- Issue date Jan 29, 2008
- International Business Machines Corporation
- Jochen Beintner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and device for automated layer generation for double-gate Fi...
- Patent number 7,315,994
- Issue date Jan 1, 2008
- International Business Machines Corporation
- Ingo Aller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Quasi self-aligned source/drain FinFET process
- Patent number 7,309,626
- Issue date Dec 18, 2007
- International Business Machines Corporation
- Mei-Kei Ieong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-height FinFETS
- Patent number 6,909,147
- Issue date Jun 21, 2005
- International Business Machines Corporation
- Ingo Aller
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Combined adder and logic unit
- Patent number 5,944,772
- Issue date Aug 31, 1999
- International Business Machines Corporation
- Juergen Haas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combined binary/decimal adder unit
- Patent number 5,928,319
- Issue date Jul 27, 1999
- International Business Machines Corporation
- Wilhelm Haller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
CMOS integrated semiconductor circuit
- Patent number 5,744,996
- Issue date Apr 28, 1998
- International Business Machines Corporation
- Gunther Kotzle
- G05 - CONTROLLING REGULATING
Information Patent Grant
Module for electronic package
- Patent number 5,306,866
- Issue date Apr 26, 1994
- International Business Machines Corporation
- Harald W. Gruber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package
- Patent number 5,162,264
- Issue date Nov 10, 1992
- International Business Machines Corporation
- Werner O. Haug
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package
- Patent number 5,016,087
- Issue date May 14, 1991
- International Business Machines Corporation
- Werner O. Haug
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit for increasing the output impedance of an amplifier
- Patent number 4,967,104
- Issue date Oct 30, 1990
- International Business Machines Corporation
- Thomas Ludwig
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for digital slope control of output signals of power amplifi...
- Patent number 4,815,113
- Issue date Mar 21, 1989
- International Business Machines Corporation
- Thomas Ludwig
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Using Port Obscurity Factors to Improve Routing
- Publication number 20120060139
- Publication date Mar 8, 2012
- International Business Machines Corporation
- Joachim Keinert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit Macro Placement Using Macro Aspect Ratio Based on Ports
- Publication number 20110289468
- Publication date Nov 24, 2011
- International Business Machines Corporation
- Joachim Keinert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Shaping Ports in Integrated Circuit Design
- Publication number 20110154283
- Publication date Jun 23, 2011
- International Business Machines Corporation
- Joachim Keinert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, Electronic Design Automation Tool, Computer Program Product...
- Publication number 20110113395
- Publication date May 12, 2011
- International Business Machines Corporation
- Joachim Keinert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PORT ASSIGNMENT IN HIERARCHICAL DESIGNS BY ABSTRACTING MACRO LOGIC
- Publication number 20100037198
- Publication date Feb 11, 2010
- International Business Machines Corporation
- Joachim Keinert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRIDDED GLYPH GEOMETRIC OBJECTS (L3GO) DESIGN METHOD
- Publication number 20090235215
- Publication date Sep 17, 2009
- International Business Machines Corporation
- Mark A. Lavin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Layout Quality Gauge for Integrated Circuit Design
- Publication number 20090089726
- Publication date Apr 2, 2009
- International Business Machines Corporation
- Fook-Luen Heng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Active Silicon Interconnect in Merged Finfet Process
- Publication number 20090050975
- Publication date Feb 26, 2009
- Andres Bryant
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FIELD EFFECT TRANSISTOR WITH RAISED SOURCE/DRAIN FIN STRAPS
- Publication number 20080286913
- Publication date Nov 20, 2008
- International Business Machines Corporation
- Brent A. Anderson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Measurement Arrangement for Determining the Characteristic Line Par...
- Publication number 20080211517
- Publication date Sep 4, 2008
- International Business Machines Corporation
- Thomas Ludwig
- G01 - MEASURING TESTING
Information Patent Application
Measurement Arrangement for Determining the Characteristic line Par...
- Publication number 20080136423
- Publication date Jun 12, 2008
- Thomas Ludwig
- G01 - MEASURING TESTING
Information Patent Application
FIELD EFFECT TRANSISTOR WITH RAISED SOURCE/DRAIN FIN STRAPS
- Publication number 20080067613
- Publication date Mar 20, 2008
- Brent A. Anderson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
QUASI SELF-ALIGNED SOURCE/DRAIN FinFET PROCESS
- Publication number 20080042202
- Publication date Feb 21, 2008
- International Business Machines Corporation
- MeiKei Ieong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DENSE CHEVRON finFET AND METHOD OF MANUFACTURING SAME
- Publication number 20080006852
- Publication date Jan 10, 2008
- Jochen Beintner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
QUASI SELF-ALIGNED SOURCE/DRAIN FinFET PROCESS
- Publication number 20070108536
- Publication date May 17, 2007
- International Business Machines Corporation
- MeiKei Ieong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DENSE CHEVRON finFET AND METHOD OF MANUFACTURING SAME
- Publication number 20070063276
- Publication date Mar 22, 2007
- International Business Machines Corporation
- Jochen Beintner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and device for automated layer generation for double-gate Fi...
- Publication number 20050136582
- Publication date Jun 23, 2005
- International Business Machines Corporation
- Ingo Aller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-HEIGHT FINFETS
- Publication number 20040222477
- Publication date Nov 11, 2004
- International Business Machines Corporation
- Ingo Aller
- H01 - BASIC ELECTRIC ELEMENTS

Thomas Ludwig

Person

Patents Grantslast 30 patents

Dense chevron finFET and method of manufacturing same

Circuit macro placement using macro aspect ratio based on ports

Shaping ports in integrated circuit design

Method, electronic design automation tool, computer program product...

Gridded glyph geometric objects (L3GO) design method

Using port obscurity factors to improve routing

Layout quality gauge for integrated circuit design

Measurement arrangement for determining the characteristic line par...

Port assignment in hierarchical designs by abstracting macro logic

Field effect transistor with raised source/drain fin straps

Field effect transistor with raised source/drain fin straps

Dense chevron finFET and method of manufacturing same

Method and device for automated layer generation for double-gate Fi...

Quasi self-aligned source/drain FinFET process

Multi-height FinFETS

Combined adder and logic unit

Combined binary/decimal adder unit

CMOS integrated semiconductor circuit

Module for electronic package

Integrated circuit package

Integrated circuit package

Circuit for increasing the output impedance of an amplifier

Method for digital slope control of output signals of power amplifi...

Patents Applicationslast 30 patents

Using Port Obscurity Factors to Improve Routing

Circuit Macro Placement Using Macro Aspect Ratio Based on Ports

Shaping Ports in Integrated Circuit Design

Method, Electronic Design Automation Tool, Computer Program Product...

PORT ASSIGNMENT IN HIERARCHICAL DESIGNS BY ABSTRACTING MACRO LOGIC

GRIDDED GLYPH GEOMETRIC OBJECTS (L3GO) DESIGN METHOD

Layout Quality Gauge for Integrated Circuit Design

Active Silicon Interconnect in Merged Finfet Process

FIELD EFFECT TRANSISTOR WITH RAISED SOURCE/DRAIN FIN STRAPS

Measurement Arrangement for Determining the Characteristic Line Par...

Measurement Arrangement for Determining the Characteristic line Par...

FIELD EFFECT TRANSISTOR WITH RAISED SOURCE/DRAIN FIN STRAPS

QUASI SELF-ALIGNED SOURCE/DRAIN FinFET PROCESS

DENSE CHEVRON finFET AND METHOD OF MANUFACTURING SAME

QUASI SELF-ALIGNED SOURCE/DRAIN FinFET PROCESS

DENSE CHEVRON finFET AND METHOD OF MANUFACTURING SAME

Method and device for automated layer generation for double-gate Fi...

MULTI-HEIGHT FINFETS