Thomas Luedeke

Person

Oberbergkirchen, DE

People

Patents Grantslast 30 patents

Information Patent Grant
System and method of power mode management for a processor
- Patent number 11,175,723
- Issue date Nov 16, 2021
- NXP USA, INC.
- Loic Hureau
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for digital only secure test mode entry
- Patent number 11,144,677
- Issue date Oct 12, 2021
- NXP USA, INC.
- Stefan Doll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power mode testing in an integrated circuit
- Patent number 11,047,904
- Issue date Jun 29, 2021
- NXP USA, INC.
- Kumar Abhishek
- G01 - MEASURING TESTING
Information Patent Grant
Monitor, integrated circuit and method for monitoring an integrated...
- Patent number 10,013,327
- Issue date Jul 3, 2018
- NXP USA, INC.
- Alistair Paul Roberston
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods of resetting a processor
- Patent number 9,940,140
- Issue date Apr 10, 2018
- NXP USA, INC.
- Thomas Henry Luedeke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for resetting an electronic device having independent device...
- Patent number 9,841,795
- Issue date Dec 12, 2017
- NXP USA, INC.
- Carl Culshaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System on chip and method therefor
- Patent number 9,781,120
- Issue date Oct 3, 2017
- NXP USA, INC.
- Michael Rohleder
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Microprocessor, and method of managing reset events therefor
- Patent number 9,733,952
- Issue date Aug 15, 2017
- NXP USA, INC.
- Thomas Luedeke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and device for reset modification based on system state
- Patent number 9,712,153
- Issue date Jul 18, 2017
- NXP USA, INC.
- Markus Regner
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Systems and methods for managing reset
- Patent number 9,697,065
- Issue date Jul 4, 2017
- NXP USA, INC.
- Kumar Abhishek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor device, and method of managing reset events therefor
- Patent number 9,448,811
- Issue date Sep 20, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Carl Culshaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electronic device and method for generating clock signals with and...
- Patent number 9,246,478
- Issue date Jan 26, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Thomas Henry Luedeke
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock glitch detection circuit
- Patent number 9,024,663
- Issue date May 5, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Michael Rohleder
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Electronic circuit, safety critical system, and method for providin...
- Patent number 8,841,946
- Issue date Sep 23, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Thomas Luedeke
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock glitch detection circuit
- Patent number 8,552,764
- Issue date Oct 8, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Michael Rohleder
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and system for signal error determination and correction in...
- Patent number 8,214,722
- Issue date Jul 3, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Thomas Luedeke
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for transmitting data in a flexray node
- Patent number 7,958,281
- Issue date Jun 7, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Thomas Luedeke
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
TRANSITIONS BETWEEN LOW POWER MODES IN A PROCESSING SYSTEM
- Publication number 20240411354
- Publication date Dec 12, 2024
- NXP USA, Inc.
- Mohit Satsangi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING WAKEUP REQUESTS USING IN A PROCESSING SYSTEM HAVING POWE...
- Publication number 20240118742
- Publication date Apr 11, 2024
- NXP USA, Inc.
- Loic Hureau
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER-ON-RESET REQUEST FUNCTIONALITY IN SEMICONDUCTOR DEVICES AND P...
- Publication number 20240053808
- Publication date Feb 15, 2024
- NXP USA, Inc.
- Alaa Eldin Y. El Sherif
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VOLTAGE REGULATOR WHICH REDUNDANTLY MONITORS FOR AN OVER-VOLTAGE CO...
- Publication number 20230185322
- Publication date Jun 15, 2023
- Loic Hureau
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Digital Only Secure Test Mode Entry
- Publication number 20210042447
- Publication date Feb 11, 2021
- NXP USA, Inc.
- Stefan Doll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD OF POWER MODE MANAGEMENT FOR A PROCESSOR
- Publication number 20200371581
- Publication date Nov 26, 2020
- NXP USA, Inc.
- Loic Hureau
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW POWER MODE TESTING IN AN INTEGRATED CIRCUIT
- Publication number 20200284830
- Publication date Sep 10, 2020
- NXP USA, Inc.
- Kumar ABHISHEK
- G01 - MEASURING TESTING
Information Patent Application
MONITOR, INTEGRATED CIRCUIT AND METHOD FOR MONITORING AN INTEGRATED...
- Publication number 20170031795
- Publication date Feb 2, 2017
- Alistair Paul ROBERSTON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF RESETTING A PROCESSOR
- Publication number 20160232008
- Publication date Aug 11, 2016
- Thomas Henry LUEDEKE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM ON CHIP AND METHOD THEREFOR
- Publication number 20160156632
- Publication date Jun 2, 2016
- FREESCALE SEMICONDUCTOR, INC.
- MICHAEL ROHLEDER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR RESETTING AN ELECTRONIC DEVICE HAVING INDEPENDENT DEVICE...
- Publication number 20160085279
- Publication date Mar 24, 2016
- FREESCALE SEMICONDUCTOR, INC.
- CARL CULSHAW
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ELECTRONIC DEVICE AND METHOD FOR GENERATING CLOCK SIGNALS WITH AND...
- Publication number 20150263709
- Publication date Sep 17, 2015
- FREESCALE SEMICONDUCTOR, INC.
- THOMAS HENRY LUEDEKE
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MICROPROCESSOR, AND METHOD OF MANAGING RESET EVENTS THEREFOR
- Publication number 20140317395
- Publication date Oct 23, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Thomas Luedeke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MICROPROCESSOR DEVICE, AND METHOD OF MANAGING RESET EVENTS THEREFOR
- Publication number 20140298005
- Publication date Oct 2, 2014
- ST MICROELECTRONICS S.R.L.
- Carl Culshaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCK GLITCH DETECTION CIRCUIT
- Publication number 20140006841
- Publication date Jan 2, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Michael Rohleder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW-VOLTAGE EXIT DETECTOR, ERROR DETECTOR, LOW-VOLTAGE SAFE CONTROL...
- Publication number 20130181696
- Publication date Jul 18, 2013
- FREESCALE SEMICONDUCTOR ,INC.
- Michael Rohleder
- G01 - MEASURING TESTING
Information Patent Application
ELECTRONIC CIRCUIT, SAFETY CRITICAL SYSTEM, AND METHOD FOR PROVIDIN...
- Publication number 20130113531
- Publication date May 9, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Thomas Luedeke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCK GLITCH DETECTION CIRCUIT
- Publication number 20110317802
- Publication date Dec 29, 2011
- Freescale Semiconductor, Inc.
- Michael Rohleder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR SIGNAL ERROR DETERMINATION AND CORRECTION IN...
- Publication number 20090193317
- Publication date Jul 30, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Thomas Luedeke
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS FOR TRANSMITTING DATA IN A FLEXRAY NODE
- Publication number 20090172216
- Publication date Jul 2, 2009
- Freescale Semiconductor Inc.
- Thomas Luedeke
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Thomas Luedeke

Person

Patents Grantslast 30 patents

System and method of power mode management for a processor

Method and apparatus for digital only secure test mode entry

Low power mode testing in an integrated circuit

Monitor, integrated circuit and method for monitoring an integrated...

Systems and methods of resetting a processor

Method for resetting an electronic device having independent device...

System on chip and method therefor

Microprocessor, and method of managing reset events therefor

Method and device for reset modification based on system state

Systems and methods for managing reset

Microprocessor device, and method of managing reset events therefor

Electronic device and method for generating clock signals with and...

Clock glitch detection circuit

Electronic circuit, safety critical system, and method for providin...

Clock glitch detection circuit

Method and system for signal error determination and correction in...

Method and apparatus for transmitting data in a flexray node

Patents Applicationslast 30 patents

TRANSITIONS BETWEEN LOW POWER MODES IN A PROCESSING SYSTEM

PROCESSING WAKEUP REQUESTS USING IN A PROCESSING SYSTEM HAVING POWE...

POWER-ON-RESET REQUEST FUNCTIONALITY IN SEMICONDUCTOR DEVICES AND P...

VOLTAGE REGULATOR WHICH REDUNDANTLY MONITORS FOR AN OVER-VOLTAGE CO...

Method and Apparatus for Digital Only Secure Test Mode Entry

SYSTEM AND METHOD OF POWER MODE MANAGEMENT FOR A PROCESSOR

LOW POWER MODE TESTING IN AN INTEGRATED CIRCUIT

MONITOR, INTEGRATED CIRCUIT AND METHOD FOR MONITORING AN INTEGRATED...

METHOD OF RESETTING A PROCESSOR

SYSTEM ON CHIP AND METHOD THEREFOR

METHOD FOR RESETTING AN ELECTRONIC DEVICE HAVING INDEPENDENT DEVICE...

ELECTRONIC DEVICE AND METHOD FOR GENERATING CLOCK SIGNALS WITH AND...

MICROPROCESSOR, AND METHOD OF MANAGING RESET EVENTS THEREFOR

MICROPROCESSOR DEVICE, AND METHOD OF MANAGING RESET EVENTS THEREFOR

CLOCK GLITCH DETECTION CIRCUIT

LOW-VOLTAGE EXIT DETECTOR, ERROR DETECTOR, LOW-VOLTAGE SAFE CONTROL...

ELECTRONIC CIRCUIT, SAFETY CRITICAL SYSTEM, AND METHOD FOR PROVIDIN...

CLOCK GLITCH DETECTION CIRCUIT

METHOD AND SYSTEM FOR SIGNAL ERROR DETERMINATION AND CORRECTION IN...

METHOD AND APPARATUS FOR TRANSMITTING DATA IN A FLEXRAY NODE