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Thomas Roessler
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Munchen, DE
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Patents Grants
last 30 patents
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Patent Grant
Method for classifying errors in the layout of a semiconductor circuit
Patent number
7,716,613
Issue date
May 11, 2010
Qimonda AG
Dirk Meyer
G06 - COMPUTING CALCULATING COUNTING
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Patent Grant
Method for classifying errors in the layout of a semiconductor circuit
Patent number
7,207,016
Issue date
Apr 17, 2007
Infineon Technologies AG
Dirk Meyer
G06 - COMPUTING CALCULATING COUNTING
Patents Applications
last 30 patents
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Patent Application
Method for classifying errors in the layout of a semiconductor circuit
Publication number
20070157142
Publication date
Jul 5, 2007
Infineon Technologies AG
Dirk Meyer
G06 - COMPUTING CALCULATING COUNTING