Thomas S. Rupp

Person

Stormville, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Vertical device formed adjacent to a wordline sidewall and method f...
- Patent number 6,699,750
- Issue date Mar 2, 2004
- Infineon Technologies North America Corp.
- Thomas S. Rupp
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor contact and method of forming the same
- Patent number 6,486,505
- Issue date Nov 26, 2002
- Infineon Technologies, AG
- Thomas S. Rupp
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Disposable spacer technology for device tailoring
- Patent number 6,444,531
- Issue date Sep 3, 2002
- Infineon Technologies AG
- Thomas S. Rupp
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Locally folded split level bitline wiring
- Patent number 6,291,335
- Issue date Sep 18, 2001
- Infineon Technologies AG
- Rainer Florian Schnabel
- G11 - INFORMATION STORAGE
Information Patent Grant
Manufacturing of cavity fuses on gate conductor level
- Patent number 6,274,440
- Issue date Aug 14, 2001
- International Business Machines Corporation
- Kenneth C. Arndt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming wires on an integrated circuit chip
- Patent number 6,268,293
- Issue date Jul 31, 2001
- International Business Machines Corporation
- Lawrence Clevenger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded vertical DRAM cells and dual workfunction logic gates
- Patent number 6,258,659
- Issue date Jul 10, 2001
- International Business Machines Corporation
- Ulrike Gruening
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process of manufacturing a vertical dynamic random access memory de...
- Patent number 6,255,158
- Issue date Jul 3, 2001
- International Business Machines Corporation
- Toshiharu Furukawa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing fusible links in a semiconductor device
- Patent number 6,210,995
- Issue date Apr 3, 2001
- International Business Machines Corporation
- Axel C. Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Contact and deep trench patterning
- Patent number 6,204,187
- Issue date Mar 20, 2001
- Infineon Technologies North America, Corp.
- Thomas S. Rupp
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with vertical transistor and buried word line
- Patent number 6,172,390
- Issue date Jan 9, 2001
- Siemens Aktiengesellschaft
- Thomas S. Rupp
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical DRAM cell with wordline self-aligned to storage trench
- Patent number 6,153,902
- Issue date Nov 28, 2000
- International Business Machines Corporation
- Toshiharu Furukawa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing semiconductor structures including a pair o...
- Patent number 6,096,664
- Issue date Aug 1, 2000
- Siemens Aktiengesellschaft
- Thomas S. Rupp
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical device formed adjacent to a wordline sidewall and method f...
- Patent number 6,091,094
- Issue date Jul 18, 2000
- Siemens Aktiengesellschaft
- Thomas S. Rupp
- H01 - BASIC ELECTRIC ELEMENTS

Thomas S. Rupp

Person

Patents Grantslast 30 patents

Vertical device formed adjacent to a wordline sidewall and method f...

Semiconductor contact and method of forming the same

Disposable spacer technology for device tailoring

Locally folded split level bitline wiring

Manufacturing of cavity fuses on gate conductor level

Method of forming wires on an integrated circuit chip

Embedded vertical DRAM cells and dual workfunction logic gates

Process of manufacturing a vertical dynamic random access memory de...

Method for manufacturing fusible links in a semiconductor device

Contact and deep trench patterning

Semiconductor device with vertical transistor and buried word line

Vertical DRAM cell with wordline self-aligned to storage trench

Method of manufacturing semiconductor structures including a pair o...

Vertical device formed adjacent to a wordline sidewall and method f...